TLC876M_07 Datasheet, PDF (7/22 Pages) Texas Instruments – 10-BIT 20 MSPS PARALLEL OUTPUT CMOS ANALOG-TO-DIGITAL CONVERTERS

TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E – JULY 1997 – REVISED OCTOBER 2000
operating characteristics at AV_DD = DV_DD = 5 V, DRV_DD = 3.3 V, V_I(REFT) = 3.6 V, V_I(REFB) = 1.6 V,
f_CLK = 20 MSPS (unless otherwise noted)
dc accuracy
PARAMETER
TEST CONDITIONS
Integral nonlinearity (INL)
Differential nonlinearity (DNL) (see Note 1)
Offset error
Gain error
NOTE 1: A differential nonlinearity error of less than ±1 LSB ensures no missing codes.
analog input
PARAMETER
Ci
Input capacitance
TEST CONDITIONS
MIN TYP MAX UNIT
± 1.5
LSB
± 0.5 <± 1
–0.4
%FSR
0.2
%FSR
MIN TYP MAX UNIT
5
pF
reference input
PARAMETER
Rref Reference input resistance
Iref Reference input current
Reference top offset voltage
Reference bottom offset voltage
TEST CONDITIONS
MIN TYP MAX UNIT
350 500
Ω
4
mA
35
mV
35
mV
dynamic performance^†
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
Effective number of bits (ENOB)
All suffixes
fI = 1 MHz
8.5
All suffixes
C and I suffixes
fI = 3.58 MHz,
TA = 25°C
fI = 3.58 MHz,
8 8.5
8 8.5
Bits
M suffix
TA = Full Range
7.5
Signal-to-total harmonic distortion+noise
(S/(THD+N))
Total harmonic distortion (THD)
Spurious free dynamic range
BW Analog input full-power bandwidth
All suffixes
All suffixes
All suffixes
C and I suffixes
M suffix
All suffixes
fI = 10 MHz
fI = 1 MHz
fI = 3.58 MHz,
TA = 25°C
fI = 3.58 MHz,
TA = Full Range
fI = 10 MHz
fI = 1 MHz
fI = 3.58 MHz
fI = 10 MHz
fI = 3.58 MHz
8.1
53
50
53
50
53
dB
47
51
–63
–62 –56 dB
–61
–64
dB
200
MHz
Differential phase
0.5
degrees
Differential gain
1%
† _{The voltage difference between AVDD and DVDD cannot exceed 0.5 V to maintain performance specifications. At input clock rise times less than}
20 ns, the offset full-scale error increases approximately by a factor of (20/tr)0.5 where tr equals the actual rise time in nanoseconds.
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