SN54GTL16612 Datasheet, PDF (8/13 Pages) Texas Instruments – 18-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS

SN54GTL16612, SN74GTL16612
18-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS
SCBS480K – JUNE 1994 – REVISED JULY 2005
www.ti.com
PARAMETER MEASUREMENT INFORMATION
V_TT = 1.2 V, V_REF = 0.8 V for GTL and V_TT = 1.5 V, V_REF = 1 V for GTL+
From Output
Under Test
C_L = 50 pF
(see Note A)
500 Ω ^S1
500 Ω
6V
Open
GND
TEST
t_PLH/t_PHL
t_PLZ/t_PZL
t_PHZ/t_PZH
S1
Open
6V
GND
V_TT
25 Ω
From Output
Under Test
C_L = 30 pF
(see Note A)
Test
Point
LOAD CIRCUIT FOR A OUTPUTS
LOAD CIRCUIT FOR B OUTPUTS
Input
t_w
V_M V
3V
V_M V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
(V_M = 1.5 V for A port and V_REF for B port)⁽¹⁾
Input
(see Note B)
1.5 V
3V
1.5 V
0V
t_PLH
Output
V_REF
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(A port to B port)⁽¹⁾
t_PHL
V_REF
V_TT
V_OL
Input
(see Note B)
V_REF
V_TT
V_REF
0V
t_PLH
Output
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(B port to A port)⁽¹⁾
t_PHL
1.5 V
V_OH
V_OL
Timing
Input
Data Input
A Port
Data Input
B Port
3V
1.5 V
0V
t_su
t_h
3V
1.5 V
0V
V_REF
V_TT
V_REF
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(see Note B)
Output
Waveform 1
S1 at 6 V
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
1.5 V
3V
1.5 V
0V
t_PZL
t_PLZ
1.5 V
3V
V_OL + 0.3 V
V_OL
t_PZH
1.5 V
t_PHZ
V_OH
V_OH − 0.3 V
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(A port)
(1) _{All control inputs are TTL levels.}
NOTES: A. C_L includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r ≤ 2.5 ns, t_f ≤ 2.5 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
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