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CD54HC4094_07 Datasheet, PDF (8/18 Pages) Texas Instruments – High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD54/74HC4094, CD74HCT4094
Test Circuits and Waveforms
6ns
CLOCK
SERIAL IN
Qn, QS1
QS2
tSU
tH
tPLH
VS
tPLH
6ns
90%
VS
10%
tW
VS
tW
tPHL
VS
INPUT LEVEL
GND
INPUT LEVEL
GND
VOH
VOL
tPHL
VOH
VOL
FIGURE 1. DATA PROPAGATION DELAYS, SET-UP AND HOLD TIMES
SERIAL IN
CLOCK
STROBE
Qn
INPUT LEVEL
tSU
tH
VS
tW
tPLH, tPHL
VS
VS
GND
INPUT LEVEL
VS
GND
VOH
VOL
VOH
VOL
FIGURE 2. STROBE PROPAGATION DELAYS AND SET-UP
AND HOLD TIMES
tr = 6ns
OE
tPLZ
OUTPUT
LOW TO OFF
tPHZ
OUTPUT
HIGH TO OFF
OUTPUTS
CONNECTED
tf = 6ns
90%
VS
10%
tPZL
10%
90%
VS
tPZH
VS
OUTPUTS
DISCONNECTED
OUTPUTS
CONNECTED
FIGURE 3. ENABLE AND DISABLE TIMES
8