CC3000MOD Datasheet, PDF (8/16 Pages) Texas Instruments – TI SimpleLink CC3000 Module . Wi-Fi 802.11b/g Network Processor

CC3000MOD
SWRS126 – NOVEMBER 2012
Table 4 lists the SPI timing parameters.
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Table 4. SPI Timing Parameters
Symbol
Parameter ^{(1) (2)}
Min
Max
Unit
T_clk
Clock period
62.5
ns
High pulse width
T_p
(including jitter and duty
25 ⁽³⁾
37.5 ⁽³⁾
ns
cycle)
RX setup time; minimum
t_is
time in which data is
stable before capture
5
ns
edge
RX hold time; minimum
t_ih
time in which data is
5
stable after capture edge
TX setup propagation
t_os
time; maximum time from
launch edge until data is
10.2
stable
TX hold propagation time;
t_oh
minimum time of data
3
stable after launch edge
C_L
Capacitive load on
interface
20
pF
(1) The SPI_CS signal is considered to be asynchronous.
(2) In this example, launch is on the rising edge, and capture is on the falling edge. The opposite scheme can be configured.
(3) 40% to 60% DC (valid for the minimum clock period)
8
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