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TMS320LC2401A Datasheet, PDF (76/88 Pages) Texas Instruments – DSP CONTROLLERS
TMS320LF2401A, TMS320LC2401A
DSP CONTROLLERS
SPRS161H − MARCH 2001 − REVISED MARCH 2004
EV
The Event Manager of the Lx2401A has reduced functionality when compared to that of the 240xA family.
Following are the important differences:
D There is no QEP unit.
D There is only one “Capture” input (CAP1).
D Although Timer 1 is present, there is no compare output pin (T1CMP/T1PWM).
D There is no provision to feed an external clock to the timers.
D There is no external direction control pin for the timers.
Due to these differences, some of the bits in the EV registers are not applicable in the Lx2401A and are shaded
gray. Refer to Table 16, Lx2401A DSP Peripheral Register Description, for more details.
ADC
The Lx2401A ADC has only five input channels as compared to eight or sixteen channels in the 240xA family.
Therefore, the 4-bit fields in the CHSELSEQn registers should be programmed with values from 0−4 only.
The Lx2401A ADC does not have dedicated VREFHI and VREFLO pins. Instead, the VCCA and VSSA pins provide
the necessary reference.
pins
The following pins, which are available in other 240xA devices, have been internally tied as indicated:
CAP2, CAP3 − low
TDIRA
− low
TCLKINA − low
BIO
− high
DINR
The device ID contained in the DINR register is 0810h.
XF pin
The XF pin has to be enabled by writing a 1 to Bit 0 of the SCSR4 register before it can be used.
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