TLV320AIC3106 Datasheet, PDF (74/99 Pages) Texas Instruments – LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY

TLV320AIC3106
SLAS509A – DECEMBER 2006 – REVISED APRIL 2007
www.ti.com
BIT
D7
D6-D0
Page 0 / Register 91: PGA_R to RIGHT_LOP/M Volume Control Register
READ/
WRITE
R/W
R/W
RESET
VALUE
0
0000000
DESCRIPTION
PGA_R Output Routing Control
0: PGA_R is not routed to RIGHT_LOP/M
1: PGA_R is routed to RIGHT_LOP/M
PGA_R to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
BIT
D7
D6-D0
Page 0 / Register 92: DAC_R1 to RIGHT_LOP/M Volume Control Register
READ/
WRITE
R/W
R/W
RESET
VALUE
0
0000000
DESCRIPTION
DAC_R1 Output Routing Control
0: DAC_R1 is not routed to RIGHT_LOP/M
1: DAC_R1 is routed to RIGHT_LOP/M
DAC_R1 to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
BIT
D7-D4
D3
D2
D1
D0
Page 0 / Register 93: RIGHT_LOP/M Output Level Control Register
READ/
WRITE
R/W
R/W
R
R
R
RESET
VALUE
0000
0
0
1
0
DESCRIPTION
RIGHT_LOP/M Output Level Control
0000: Output level control = 0-dB
0001: Output level control = 1-dB
0010: Output level control = 2-dB
...
1000: Output level control = 8-dB
1001: Output level control = 9-dB
1010–1111: Reserved. Do not write these sequences to these register bits.
RIGHT_LOP/M Mute
0: RIGHT_LOP/M is muted
1: RIGHT_LOP/M is not muted
Reserved. Don’t write to this register bit.
RIGHT_LOP/M Volume Control Status
0: All programmed gains to RIGHT_LOP/M have been applied
1: Not all programmed gains to RIGHT_LOP/M have been applied yet
RIGHT_LOP/M Power Status
0: RIGHT_LOP/M is not fully powered up
1: RIGHT_LOP/M is fully powered up
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