VCA8500_0803 Datasheet, PDF (7/40 Pages) Texas Instruments – 8-Channel, Ultralow-Power, Variable Gain Amplifier with Low-Noise Pre-Amp

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TERMINAL
PIN NO.
NAME
19
OUT3
20
OUT3
21
OUT2
22
OUT2
23
OUT1
24
OUT1
25
OUT5
26
OUT5
27
OUT6
28
OUT6
29
OUT7
30
OUT7
31
OUT8
32
OUT8
33
AVDD1
34
V_REFL
35
V_REFH
36
VB4
37
VB6
38
VB2
39
AVDD2
40
IN8
41
VBL8
42
IN7
43
VBL7
44
VBL6
45
IN6
46
AVDD1
47
IN5
48
VBL5
49
PD
50
CW0
51
CW1
52
CW2
53
CW3
54
CW4
55
D_IN
56
CLK
57
D_OUT
58
RST
59
DVDD
60
CW5
61
CW6
62
CW7
63
CW8
64
CW9
—
GND
VCA8500
SBOS390A – JANUARY 2008 – REVISED MARCH 2008
Table 1. TERMINAL FUNCTIONS (continued)
I/O
DESCRIPTION
O
PGA output channel 3 (inverted)
O
PGA output channel 3
O
PGA output channel 2 (inverted)
O
PGA output channel 2
O
PGA output channel 1 (inverted)
O
PGA output channel 1
O
PGA output channel 5 (inverted)
O
PGA output channel 5
O
PGA output channel 6 (inverted)
O
PGA output channel 6
O
PGA output channel 7 (inverted)
O
PGA output channel 7
O
PGA output channel 8 (inverted)
O
PGA output channel 8
+3.3V analog supply
Clamp reference level low, 2.0V; bypass with 0.1µF capacitor (min)
Clamp reference level high, 2.7V; bypass with 0.1µF capacitor (min)
Internal bias voltage (+2.4V); bypass with 0.1µF capacitor (min)
Internal bias voltage (+2.9V); bypass with 0.1µF capacitor (min)
Internal bias voltage (+2.7V); bypass with 0.1µF capacitor (min)
+5V analog supply (VCA, CW)
I
LNA input channel 8
LNA bias voltage (+2.4V); bypass with 0.1µF capacitor (min)
I
LNA input channel 7
LNA bias voltage (+2.4V); bypass with 0.1µF capacitor (min)
I
LNA bias voltage (+2.4V); bypass with 0.1µF capacitor (min)
LNA input channel 6
+3.3V analog supply
I
LNA input channel 5
LNA bias voltage (+2.4V); bypass with 0.1µF capacitor (min)
I
Power-down pin for standby mode; 0 = normal operation, 1 = power down
O
CW channel 0 current output
O
CW channel 1 current output
O
CW channel 2 current output
O
CW channel 3 current output
O
CW channel 4 current output
I
Serial data input
I
Clock input for serial interface
O
Serial data output
I
Reset input; rising edge resets register to default values.
+3.3V digital supply; connect to a low-noise analog supply plane (AVDD1)
CW channel 5 current output
CW channel 6 current output
CW channel 7 current output
CW channel 8 current output
CW channel 9 current output
PowerPAD must be connected to the analog ground of the printed circuit board; use this ground for
bypass capacitor return ground.
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): VCA8500
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