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SN75LVDS83 Datasheet, PDF (7/15 Pages) Texas Instruments – FLATLINKE TRANSMITTER
SN75LVDS83
FLATLINK™ TRANSMITTER
SLLS271B – MARCH 1997 – REVISED NOVEMBER 1999
PARAMETER MEASUREMENT INFORMATION
Dn
ÉÉÉÉÉÉÉÉÉÉ tsu
th ÉÉÉÉÉÉÉÉ
CLKIN
NOTE A: All input timing is defined at 1.4 V on an input signal with a 10%-to-90% rise or fall time of less than 5 ns.
Figure 2. Setup and Hold Time Waveforms
YP
49.9 Ω ± 1% (2 Places)
VOD
YM
VOC
CL = 10 pF Max
(2 Places)
NOTE A: The lumped instrumentation capacitance for any
single-ended voltage measurement is less than or equal
to 10 pF. When making measurements at YP or YM, the
complementary output is similarly loaded.
(a) SCHEMATIC
VOD(H)
tf
VOD(L)
100%
80%
0V
20%
0%
tr
CLKSEL LOW
CLKSEL HIGH
VOC(SS)
VOC(SS)
VOC(PP)
0V
(b) WAVEFORMS
Figure 3. Test Load and Voltage Waveforms for LVDS Outputs
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