SLVA371A Datasheet, PDF (7/10 Pages) Texas Instruments – Powering Freon with TPS65070

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Detailed Power Sequence
3 Detailed Power Sequence
1. The 1.2-V Real-Time Clock supply RTC_CVDD is supplied by an external LDO that is powered and
enabled by AVDD6. AVDD6 is an output of the TPS65070 that is always on. As soon as input power is
applied to the TPS65070, the external LDO is supplied and starts up.
2. The sequencing begins when the pushbutton input PB_IN is pulled low. When PB_IN is pulled low, the
TPS65070 begins with the automatic sequencing for dc-to-dc converters and low-dropout regulators
(LDOs) defined in the registers CTRL_1 and LDO_CTRL.
3. DCDC Converter 3 is the first rail to start up in the automatic sequence.
4. After PGOOD goes high (400 ms after DCDC3 is within regulation), DCDC2, LDO1, and LDO2
become enabled. DCDC2 and LDO2 ramp up immediately. LDO1 will be connected by delay to the
OMAP-L1x8 with an external transistor from DCDC2 in case the OMAP-L1x8 is working with 1.8-V I/O
(with DCDC2 configured for 1.8 V). If OMAP-L1x8 is working with 3.3-V I/O (that is, with DCDC2
configured for 3.3 V), LDO1 can be directly connected to the OMAP-L1x8; there is no need for the
external delay circuit T1, T2, R3, and R4.
5. DCDC1 will be enabled after DCDC2 ramps up. The EN_DCDC1 pin is controlled from an external
supply voltage supervisor (SVS) that pulls the enable pin to SYS after DCDC2 ramps up.
6. In order to keep the converters and LDOs of the TPS65070 enabled, the POWER_ON input of the
TPS65070 must be driven high before PB_IN is released high. POWER_ON is connected to a GPIO of
the OMAP-L138 that drives PWR_ON high after the processor starts up.
4 Test Results
Figure 4 through Figure 7 illustrate the test results.
Figure 4. Startup of DC/DC Converters and LDO2 (DCDC2 = 1.8 V)
SLVA371A – February 2010 – Revised April 2010
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Powering Freon with TPS65070
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