SLVA371A Datasheet, PDF (2/10 Pages) Texas Instruments – Powering Freon with TPS65070

OMAP-L1x8 Power and Sequencing Requirements
1 OMAP-L1x8 Power and Sequencing Requirements
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1.1 Power Requirements
Table 1 summarizes the power requirements for the OMAP-L138 processor.
Table 1. OMAP-L1x8 Power Requirements^(1)(2)(3)
Pin Name
I/O
RTC_CVDD
Voltage
1.2 V
I_MAX
1 mA
Tolerance
–25%, +10%
Sequencing
Order
1 ⁽⁴⁾
Timing Delay
n/a
Core
CVDD
1.0 V / 1.1 V /
1.2 V
600 mA
–9.75%, +10%
2
n/a
VDDARNWA.,VDDARNW1,
I/O
PLL0_VDDA, PLL1_VDDA,
SATA_VDD, USB_CVDD,
1.2 V
200 mA
–5%, +10%
3
n/a
USB0_VDDA12
USB0_VDDA18,
I/O
USB1_VDDA18,
DDR_DVDD18, SATA_VDDR,
1.8 V
180 mA
±5%
4
n/a
DVDD18
I/O
USB0_VDDA33,
USB1_VDDA33
3.3 V
24 mA
±5%
5
n/a
I/O
DVDD3318_A, DVDD3318_B,
DVDD3318_C
1.8 V / 3.3 V
50 mA /
90 mA⁽⁵⁾
±5%
4/5
n/a
(1) _{If using CVDD at fixed 1.2 V, all 1.2-V rails may be combined.}
(2) _{If 1.8-V LVCMOS is used, power rails up with the 1.8-V rails. If 3.3-V LVCMOS is used, power it up with the ANALOG33 rails}
(VDDA33_USB0/1)
(3) _{There is no specific required voltage ramp rate for any of the supplies LVCMOS33 never exceeds STATIC18 by more than 2 V.}
(4) _{If RTC is not used/maintained on a separate supply, it can be included in the STATIC12 (fixed 1.2 V) group.}
(5) _{If DVDD3318_A, B, and C are powered independently, the maximum power for each rail will be 1/3 the max power shown in this}
table.
1.2 Power-Up Sequence
The power-up sequence is divided into groups of the same voltages.
Use the power-up sequence described in Table 2. DCDC3, DCDC2, LDO1, and LDO2 are part of the
automatic power-up sequence.
Order
1
2
3
4
Table 2. OMAP-L138 Power Groups
Group
RTC12
STATIC12
STATIC18
STATIC33
Voltage
1.2 V
1.2 V
1.8 V
3.3 V
DCDC1 is not part of the power-up sequence. DCDC1 is controlled by its ENABLE pin (EN_DCDC1).
EN_DCDC1 is driven from a supervisor circuit (SVS) that monitors DVDD3318 (DCDC2). Once the output
voltage of DCDC2 increases above the threshold set with R1 and R2, the SVS pulls tEN_DCDC1 up to
V_SYS, thereby enabling DCDC1; see Figure 1.
If DVDD3318 (DCDC2) is configured for 1.8 V (DEFDCDC2 = low), LDO1 is isolated from the OMAP-L138
with an external transistor, T2. T2 connects the output of LDO1 to the OMAP-L138 delayed by an external
circuit consisting of T1, T2, R3, and R4 to meet the correct power-up sequence requirements. If
DVDD3318 (DCDC2) is configured for 3.3 V (DEFDCDC2 = high), this external delay circuit is not
required. The LDO output can be directly connected to the OMAP-L138.
2
Powering Freon with TPS65070
SLVA371A – February 2010 – Revised April 2010
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