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LP38841-ADJ_15 Datasheet, PDF (7/15 Pages) Texas Instruments – 0.8A Ultra Low Dropout Adjustable Linear Regulators Stable with Ceramic Output Capacitors
LP38841-ADJ
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APPLICATION HINTS
SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013
SETTING THE OUTPUT VOLTAGE
(Refer to Typical Application Circuit)
The output voltage is set using the resistive divider R1 and R2. The output voltage is given by the formula:
VOUT = VADJ x (1 + R1 / R2)
(1)
The value of R2 must be 10k or less for proper operation.
EXTERNAL CAPACITORS
To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit.
OUTPUT CAPACITOR
An output capacitor is required on the LP3884X devices for loop stability. The minimum value of capacitance
necessary depends on type of capacitor: if a solid Tantalum capacitor is used, the part is stable with capacitor
values as low as 4.7µF. If a ceramic capacitor is used, a minimum of 22 µF of capacitance must be used
(capacitance may be increased without limit). The reason a larger ceramic capacitor is required is that the output
capacitor sets a pole which limits the loop bandwidth. The Tantalum capacitor has a higher ESR than the
ceramic which provides more phase margin to the loop, thereby allowing the use of a smaller output capacitor
because adequate phase margin can be maintained out to a higher crossover frequency. The tantalum capacitor
will typically also provide faster settling time on the output after a fast changing load transient occurs, but the
ceramic capacitor is superior for bypassing high frequency noise.
The output capacitor must be located less than one centimeter from the output pin and returned to a clean
analog ground. Care must be taken in choosing the output capacitor to ensure that sufficient capacitance is
provided over the full operating temperature range. If ceramics are selected, only X7R or X5R types may be
used because Z5U and Y5F types suffer severe loss of capacitance with temperature and applied voltage and
may only provide 20% of their rated capacitance in operation.
INPUT CAPACITOR
The input capacitor is also critical to loop stability because it provides a low source impedance for the regulator.
The minimum required input capacitance is 10 µF ceramic (Tantalum not recommended). The value of CIN may
be increased without limit. As stated above, X5R or X7R must be used to ensure sufficient capacitance is
provided. The input capacitor must be located less than one centimeter from the input pin and returned to a clean
analog ground.
FEED FORWARD CAPACITOR
(Refer to Typical Application Circuit)
A capacitor placed across R1 can provide some additional phase margin and improve transient response. The
capacitor CFF and R1 form a zero in the loop response given by the formula:
FZ = 1 / (2 x π x CFF x R1)
(2)
For best effect, select CFF so the zero frequency is approximately 70 kHz. The phase lead provided by CFF drops
as the output voltage gets closer to 0.56V (and R1 reduces in value). The reason is that CFF also forms a pole
whose frequency is given by:
FP = 1 / (2 x π x CFF x R1 // R2)
(3)
As R1 reduces, the two equations come closer to being equal and the pole and zero begin to cancel each other
out which removes the beneficial phase lead of the zero.
BIAS CAPACITOR
The 0.1µF capacitor on the bias line can be any good quality capacitor (ceramic is recommended).
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