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CD74HC540 Datasheet, PDF (7/8 Pages) Texas Instruments – High Speed CMOS Logic Octal Buffer and Line Drivers, Three-State
Test Circuits and Waveforms (Continued)
OTHER
INPUTS
TIED HIGH
OR LOW
OUTPUT
DISABLE
IC WITH
THREE-
STATE
OUTPUT
OUTPUT
RL = 1kΩ
CL
50pF
VCC FOR tPLZ AND tPZL
GND FOR tPHZ AND tPZH
NOTE: Open drain waveforms tPLZ and tPZL are the same as those for three-state shown on the left. The test circuit is Output RL = 1kΩ to
VCC, CL = 50pF.
FIGURE 5. HC AND HCT THREE-STATE PROPAGATION DELAY TEST CIRCUIT
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