ADC084S021CIMM Datasheet, PDF (7/27 Pages) Texas Instruments – ADC084S021 4-Channel, 50 ksps to 200 Ksps, 8-Bit A/D Converter

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ADC084S021
SNAS279E – APRIL 2005 – REVISED MARCH 2013
Figure 3. Timing Test Circuit
CS
t_ACQ
t_CH
t_CONVERT
SCLK
1
t_EN
2
3
4
5
6
7
8
t_CL
t_ACC
DOUT
Z3
Z2
Z1
Z0 DB7 DB6 DB5 DB4
t_SU
t_H
11
12
13
14
15
16
t_DIS
DB1 DB0 Zero
Tri-State
Zero Zero Zero
DIN
DONT DONTC ADD2 ADD1 ADD0 DONTC DONTC DONTC
Figure 4. ADC084S021 Serial Timing Diagram
CS
SCLK
t_CSU
SCLK
t_CLH
Figure 5. SCLK and CS Timing Parameters
Specification Definitions
ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold
capacitor to charge up to the input voltage.
APERTURE DELAY is the time between the fourth falling SCLK edge of a conversion and the time when the
input signal is acquired or held for conversion.
CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input
voltage to a digital word.
CROSSTALK is the coupling of energy from one channel into the other channel, or the amount of signal energy
from one analog input that appears at the measured analog input.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1
LSB.
DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The
specification here refers to the SCLK.
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