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TMS320LF2401A_07 Datasheet, PDF (68/88 Pages) Texas Instruments – DSP CONTROLLERS | |||
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TMS320LF2401A, TMS320LC2401A
DSP CONTROLLERS
SPRS161K â MARCH 2001 â REVISED JULY 2007
low-power mode timing
switching characteristics over recommended operating conditions [H = 0.5tc(CO)]
(see Figure 30, Figure 31, and Figure 32)
td(WAKE-A)
td(IDLE-COH)
td(WAKE-OSC)
td(IDLE-OSC)
td(EX)
PARAMETER
LOW-POWER MODES
Delay time, CLKOUT switching to
program execution resume
IDLE1
IDLE2
LPM0
LPM1
Delay time, Idle instruction executed to
CLKOUT high
IDLE2
LPM1
Delay time, wake-up interrupt
asserted to oscillator running
Delay time, Idle instruction executed to
oscillator power off
HALT
{PLL/OSC power down}
Delay time, reset vector executed after RS high
LPM2
MIN
TYP
MAX
12 Ã tc(CO)
15 Ã tc(CO)
4tc(CO)
OSC start-up
and PLL lock
time
4tc(CO)
36H
UNIT
ns
ns
ms
ns
ns
A0âA15
CLKOUTâ â¡
td(WAKEâA)
WAKE INT§
â In 2401A, CLKOUT will not be seen at the pin, only in some modes; it can be enabled in software.
â¡ Unlike other 24x/240x devices, the CLKOUT signal does not appear on the CLKOUT pin by default (after a device reset). The CLKOUT waveform
depicted in the figure is present internally in the DSP. However, in order to route the internal CLKOUT signal to the
XINT2/ADCSOC/CAP1/IOPA7/CLKOUT pin, bit 7 of the MCRA register must be programmed appropriately.
§ WAKE INT can be any valid interrupt or RESET.
Figure 30. IDLE1 Entry and Exit Timing â LPM0
A0âA15
td(IDLEâCOH)
CLKOUTâ â¡
WAKE INT§
td(WAKEâA)
â In 2401A, CLKOUT will not be seen at the pin, only in some modes; it can be enabled in software.
â¡ Unlike other 24x/240x devices, the CLKOUT signal does not appear on the CLKOUT pin by default (after a device reset). The CLKOUT waveform
depicted in the figure is present internally in the DSP. However, in order to route the internal CLKOUT signal to the
XINT2/ADCSOC/CAP1/IOPA7/CLKOUT pin, bit 7 of the MCRA register must be programmed appropriately.
§ WAKE INT can be any valid interrupt or RESET.
Figure 31. IDLE2 Entry and Exit Timing â LPM1
68
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