MSP430F563X Datasheet, PDF (68/101 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F563x
SLAS650A – JUNE 2010 – REVISED JULY 2010
www.ti.com
Flash Memory (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
MIN TYP
t_{Seg Erase}
Erase time for segment, mass erase, and bank erase when
available
See ⁽²⁾
23
f_MCLK,MGR
MCLK frequency in marginal read mode
(FCTL4.MGR0 = 1 or FCTL4.MGR1 = 1)
0
MAX UNIT
32 ms
1 MHz
JTAG and Spy-Bi-Wire Interface
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
MIN TYP MAX UNIT
f_SBW
t_SBW,Low
t_{SBW, En}
Spy-Bi-Wire input frequency
Spy-Bi-Wire low clock pulse length
Spy-Bi-Wire enable time (TEST high to acceptance of first clock
edge) ⁽¹⁾
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
0
0.025
20 MHz
15 µs
1 µs
t_SBW,Rst
f_TCK
Spy-Bi-Wire return to normal operation time
TCK input frequency - 4-wire JTAG⁽²⁾
15
2.2 V
0
3V
0
100 µs
5 MHz
10 MHz
R_internal
Internal pull-down resistance on TEST
2.2 V/3 V
45
60
80 kΩ
(1) Tools accessing the Spy-Bi-Wire interface need to wait for the t_SBW,En time after pulling the TEST/SBWTCK pin high before applying the
first SBWTCK clock edge.
(2) f_TCK may be restricted to meet the timing requirements of the module selected.
68
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