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TPS40170_15 Datasheet, PDF (6/47 Pages) Texas Instruments – TPS40170 4.5 V to 60 V Wide Input Synchronous PWM Buck Controller
TPS40170
SLUS970B – NOVEMBER 2013 – REVISED DECEMBER 2014
Electrical Characteristics (continued)
Unless otherwise stated, these specifications apply for -40ºC ≤ TJ ≤ 125ºC, VVIN=12 V
PARAMETER
TEST CONDITIONS
DMAX (1)
Maximum duty cycle
ERROR AMPLIFIER
fSW = 100 kHz, 4.5 V < VIN ≤ 60 V
FSW = 300 kHz, 4.5 V < VIN ≤ 60 V
fSW = 600 kHz, 4.5 V < VIN ≤ 60 V
GBWP (2)
Gain bandwidth product
AOL (2)
Open-loop gain
IIB
Input bias current
IEAOP
Output source current
IEAOM
Output sink current
PROGRAMMABLE SOFT-START
VFB = 0 V
VFB = 1 V
ISS(source,start)
ISS(source,normal)
ISS(sink)
VSS(fltH)
Soft-start source current at VSS < 0.5 V
Soft-start source current at VSS > 0.5 V
Soft-start sink current
SS pin HIGH voltage during fault (OC or thermal) reset
timing
VSS = 0.25 V
VSS = 1.5 V
VSS = 1.5 V
VSS(fltL)
SS pin LOW voltage during fault (OC or thermal) reset
timing
VSS(steady_state)
VSS(offst)
TRACKING
SS pin voltage during steady-state
Initial offset voltage from SS pin to error amplifier input
VTRK(ctrl) (2)
Range of TRK which overrides VREF
SYNCHRONIZATION (MASTER/SLAVE)
4.5 V < VIN ≤ 60 V
VMSTR
M/S pin voltage in master mode
VSLV(0)
M/S pin voltage in slave 0 deg mode
VSLV(180)
M/S pin voltage in slave 180 deg mode
ISYNC(in)
SYNC pin pull-down current
VSYNC(in_high) SYNC pin input high-voltage level
VSYNC(in_low) SYNC pin input low-voltage level
tSYNC(high_min) Minimum SYNC high pulse-width
tSYNC(low_min) Minimum SYNC low pulse-width
GATE DRIVERS
M/S configured as slave- 0 degrees or
slave-180 degrees
RHDHI
High-side driver pull-up resistance
RHDLO
High-side driver pull-down resistance
RLDHI
Low-side driver pull-up resistance
RLDLO
Low-side driver pull-down resistance
tNON-OVERLAP1 Time delay between HDRV fall and LDRV rise
tNON-OVERLAP2 Time delay between HDRV rise and LDRV fall
OVERCURRENT PROTECTION (LOW-SIDE MOSFET SENSING)
CLOAD = 2.2 nF, IDRV = 300 mA
CLOAD = 2.2 nF,
VHDRV = 2 V, VLDRV = 2 V
IILIM
IILIM,(ss)
IILIM,
(2)
Tc
VILIM (2)
OCPTH
ILIM pin source current
ILIM pin source current during Soft-start
Temperature coefficient of ILIM current
ILIM pin voltage operating range
Overcurrent protection threshold (Voltage across low-
side FET for detecting overcurrent)
SHORT CIRCUIT PROTECTION HIGH-SIDE MOSFET SENSING)
4.5 V < VIN < 60 V, TJ = 25°C
4.5 V < VIN < 60 V
4.5 V < VIN < 60 V
RILIM = 10 kΩ, IILIM = 10 µA
(VILIM = 100 mV)
VLDRV(max)
AOC3
AOC7
AOC15
LDRV pin maximum voltage during calibration
Multiplier factor to set the SCP based on OCP level
setting at the ILIM pin
RLDRV = open
RLDRV = 10 kΩ
RLDRV = open
RLDRV = 20 kΩ
(2) Specified by design. Not production tested.
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MIN
95%
91%
82%
TYP MAX
UNIT
7 10 13 MHz
80 90 95
dB
100
nA
2
mA
2
42 52 62
9.3 11.6 13.9
µA
0.77 1.05 1.33
2.38 2.50 2.61
V
235 300 375 mV
3.25 3.30 3.50
V
525 650 775 mV
0
600 mV
3.9
VIN
1.25
1.75
V
0
0.75
8 11 14
µA
2
V
0.8
40 50
ns
40 50
1.37 2.64 3.50
1.08 2.40 3.35
Ω
1.37 2.40 3.20
0.44 1.10 1.70
50
ns
60
9.00 9.75 10.45
µA
15
1400
ppm
50
300
mV
–110 –100 –84
300 360 mV
2.75 3.20 3.60
6.40 7.25 7.91 V/V
13.9 16.4 18.0
6
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