TLC540I Datasheet, PDF (6/11 Pages) Texas Instruments – 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS

TLC540I, TLC541I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS
SLAS065A – OCTOBER 1983 – REVISED MARCH 1995
operating characteristics over recommended operating free-air temperature range,
V_CC = V_ref+ – 4.75 V to 5.5 V, f_clock(I/O) = 2.048 MHz for TLC540 or 1.1 MHz for TLC541,
f_clock(SYS) = 4 MHz for TLC540 or 2.1 MHz for TLC541
PARAMETER
TEST CONDITIONS
TLC540
MIN
MAX
TLC541
MIN
MAX
UNIT
EL
Linearity error
EZS Zero–scale error
EFS Full-scale error
Total unadjusted error
See Note 5
See Notes 2 and 6
See Notes 2 and 6
See Note 7
± 0.5
± 0.5
± 0.5
± 0.5
± 0.5
LSB
± 0.5
LSB
± 0.5
LSB
± 0.5
LSB
Self-test output code
Input A11 address = 1011, 01111101 10000011 01111101 10000011
(see Note 8)
(125)
(131)
(125)
(131)
tconv Conversion time
See Operating Sequence
9
Total access and conversion time
See Operating Sequence
13.3
17
µs
25
µs
ta
Channel acquisition time (sample cycle) See Operating Sequence
4
I/O
4
clock
cylces
tv
Time output data remains valid after
I/O CLOCK↓
10
10
ns
td
Delay time, I/O CLOCK↓ to data output
valid
300
400
ns
ten
tdis
tr(bus)
Output enable time
Output disable time
Data bus rise time
See Parameter
Measurement
Information
150
150
ns
150
150
ns
300
300
ns
tf(bus) Data bus fall time
300
300
ns
NOTES: 2. Analog input voltages greater than that applied to REF+ convert to all “1”s (11111111) while input voltages less than that applied to
REF– convert to all “0”s (00000000). For proper operation, REF+ voltage must be at least 1 V higher than REF– voltage. Also, the
total unadjusted error may increase as this differential reference voltage falls below 4.75 V.
5. Linearity error is the maximum deviation from the best straight line through the A/D transfer characteristics.
6. Zero-scale error is the difference between 00000000 and the converted output for zero input voltage; full-scale error is the difference
between 11111111 and the converted output for full-scale input voltage.
7. Total unadjusted error is the sum of linearity, zero-scale, and full-scale errors.
8. Both the input address and the output codes are expressed in positive logic.
6
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