THS7320 Datasheet, PDF (6/35 Pages) Texas Instruments – 3-Channel ED Filter Video Amplifier with 4-V/V Gain

THS7320
SBOS565B – JULY 2011 – REVISED SEPTEMBER 2012
PIN CONFIGURATION
YHC PACKAGE
WCSP 9-BALL
(TOP VIEW)
1
2
3
Ch 1 IN GND Ch 1 OUT
A
Ch 2 IN EN Ch 2 OUT
B
Ch 3 IN
V_{S+ Ch 3 OUT}
C
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NAME
Channel 1 input
GND
Channel 1 output
Channel 2 input
EN
Channel 2 output
Channel 3 input
V_S+
Channel 3 output
PIN ASSIGNMENTS
NO.
I/O
DESCRIPTION
A1
I Video input, channel 1
A2
I Ground for all circuitry
A3
O Video output, channel 1
B1
I Video input, channel 2
B2
I
Video enable pin. Logic high enables the video channels; logic low disables the video
channels.
B3
O Video output, channel 2
C1
I Video input, channel 3
C2
I Power-supply pin; connect to +2.6 V up to +5 V.
C3
O Video output, channel 3
FUNCTIONAL BLOCK DIAGRAM
Channel 1 Input
2 V/V
Channel 2 Input
2 V/V
Channel 3 Input
2 V/V
Level
Shift
3-Pole
20-MHz
LPF
Level
Shift
3-Pole
20-MHz
LPF
Level
Shift
3-Pole
20-MHz
LPF
1 MW
2 V/V
Channel 1 Output
2 V/V
Channel 2 Output
2 V/V
Channel 3 Output
V_S+
Enable
6
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