PCA6107 Datasheet, PDF (6/24 Pages) Texas Instruments – REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS

PCA6107
REMOTE 8-BIT I²C AND SMBus LOW-POWER I/O EXPANDER
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS
SCPS139B – JANUARY 2006 – REVISED OCTOBER 2006
www.ti.com
A master receiver signals an end of data to the slave transmitter by not generating an acknowledge (NACK)
after the last byte has been clocked out of the slave. This is done by the master receiver by holding the SDA line
high. In this event, the transmitter must release the data line to enable the master to generate a Stop condition.
SDA
SCL
S
P
Start Condition
Stop Condition
Figure 1. Definition of Start and Stop Conditions
SDA
SCL
Data Line Change
Figure 2. Bit Transfer
Data Output
by Transmitter
Data Output
by Receiver
NACK
ACK
SCL From
Master
S
Start
Condition
1
2
8
Figure 3. Acknowledgment on the I²C Bus
9
Clock Pulse for
Acknowledgment
Interface Definition
BYTE
BIT
7 (MSB)
6
5
4
3
2
1
0 (LSB)
I²C slave address
L
L
H
H
A2
A1
A0
R/W
Px I/O data bus
P7
P6
P5
P4
P3
P2
P1
P0
6
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