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CD74AC74 Datasheet, PDF (6/8 Pages) Texas Instruments – Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered
◁
CD74AC74, CD74ACT74
Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued)
-40oC TO 85oC
-55oC TO 125oC
PARAMETER
SYMBOL
VCC (V)
MIN
Propagation Delay, R, S to Q, Q
tPLH
1.5
-
3.3
3.8
TYP
MAX
MIN
TYP
MAX UNITS
-
120
-
-
132
ns
-
13.4
3.7
-
14.7
ns
5
2.7
-
9.5
2.6
-
10.5
ns
tPHL
1.5
-
-
131
-
-
144
ns
3.3
4.1
-
14.6
4
-
16.1
ns
5
3
-
10.4
2.9
-
11.5
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 16)
-
-
10
-
-
10
pF
-
55
-
-
55
-
pF
ACT TYPES
Propagation Delay, CP to Q, Q
tPHL
tPLH
5
2.5
(Note 15)
Propagation Delay, R, S to Q, Q
tPLH
5
3
tPHL
5
3.2
Input Capacitance
CI
-
-
Power Dissipation Capacitance
CPD
-
-
(Note 16)
-
8.6
2.4
-
9.5
ns
-
10.5
2.9
-
11.5
ns
-
11.4
3.1
-
12.5
ns
-
10
-
-
10
pF
55
-
-
55
-
pF
NOTES:
13. Limits tested 100%.
14. 3.3V Min at 3.6V, Max at 3V.
15. 5V Min at 5.5V, Max at 4.5V.
16. CPDPD=isCuPsDeVdCtCo2dfei t+erΣm(iCneLVthCeCd2yfnoa) m+ iVc CpCow∆eICr Ccownshuemrepftiio=ninppeurtflfirpe-qfluoepn. cy, fo = output frequency, CL = output load capacitance, VCC =
supply voltage.
INPUT LEVEL
CP
VS
VS
GND
tW
tPHL
Q OR Q
VS
VS
tPLH
VS
FIGURE 1.
INPUT LEVEL
R (S) VS
VS
GND
tW
INPUT
CP
(Q)
Q
(Q)
Q
tPLH
VS
tREM
VS
FIGURE 2.
INPUT LEVEL
D
GND
INPUT LEVEL
CP
GND
VS
tSU(L)
VS
VS
tH(L)
tSU(H)
VS
VS
tH(H)
VS
FIGURE 3.
6
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