CD74AC74 Datasheet, PDF (4/8 Pages) Texas Instruments – Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

CD74AC74, CD74ACT74
DC Electrical Specifications (Continued)
PARAMETER
Low Level Output Voltage
SYMBOL
V_OL
TEST
CONDITIONS
V_I (V)
V_IH or V_IL
I_O (mA)
0.05
0.05
-40^oC TO
-55^oC TO
V_CC
25^oC
85^oC
125^oC
(V) MIN MAX MIN MAX MIN MAX UNITS
1.5
-
0.1
-
0.1
-
0.1
V
3
-
0.1
-
0.1
-
0.1
V
0.05
4.5
-
0.1
-
0.1
-
0.1
V
12
3
-
0.36
-
0.44
-
0.5
V
24
4.5
-
0.36
-
0.44
-
0.5
V
75
5.5
-
-
-
1.65
-
-
V
(Note 9, 10)
50
5.5
-
-
-
-
-
1.65
V
(Note 9, 10)
Input Leakage Current
I_I
V_CC or
-
5.5
-
±0.1
-
±1
-
±1
µA
GND
Quiescent Supply Current,
I_CC
V_CC or
0
5.5
-
4
-
40
-
80
µA
FF
GND
ACT TYPES
High Level Input Voltage
V_IH
-
-
4.5 to 2
-
2
-
2
-
V
5.5
Low Level Input Voltage
V_IL
-
-
4.5 to -
0.8
-
0.8
-
0.8
V
5.5
High Level Output Voltage
V_OH
V_IH or V_IL
-0.05
4.5 4.4
-
4.4
-
4.4
-
V
-24
4.5 3.94
-
3.8
-
3.7
-
V
-75
5.5
-
-
3.85
-
-
-
V
(Note 9, 10)
-50
5.5
-
-
-
-
3.85
-
V
(Note 9, 10)
Low Level Output Voltage
V_OL
V_IH or V_IL
0.05
24
4.5
-
0.1
-
0.1
-
0.1
V
4.5
-
0.36
-
0.44
-
0.5
V
75
5.5
-
-
-
1.65
-
-
V
(Note 9, 10)
50
5.5
-
-
-
-
-
1.65
V
(Note 9, 10)
Input Leakage Current
I_I
V_CC or
-
5.5
-
±0.1
-
±1
-
±1
µA
GND
Quiescent Supply Current,
I_CC
V_CC or
0
5.5
-
4
-
40
-
80
µA
FF
GND
Additional Supply Current per ∆I_CC
V_CC
Input Pin TTL Inputs High
-2.1
1 Unit Load
-
4.5 to -
2.4
-
2.8
-
3
mA
5.5
NOTES:
9. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.
10. Test verifies a minimum 50Ω transmission-line-drive capability at 85^oC, 75Ω at 125^oC.
ACT Input Load Table
INPUT
UNIT LOAD
D
0.53
R, S
0.58
CP
1
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4