ADS5295 Datasheet, PDF (58/91 Pages) Texas Instruments – 12-Bit, 100-MSPS, 8-Channel Analog-to-Digital Converter

ADS5295
SBAS595 – DECEMBER 2012
APPLICATION INFORMATION
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THEORY OF OPERATION
The ADS5295 is a low-power, 8-channel, 12-bit analog-to-digital converter (ADC) with sample rates up to
100 MSPS that run off of a single 1.8-V supply. All eight channels simultaneously sample the analog inputs at the
input clock rising edge. The sampled signal is sequentially converted by a series of small resolution stages, with
the outputs combined in a digital correction logic block. At every clock edge, the sample propagates through the
pipeline, resulting in a data latency of 12 clock cycles.
ANALOG INPUT
The analog input consists of a switched-capacitor-based, differential sample-and-hold architecture, as shown in
Figure 46. This differential topology results in very good ac performance even for high input frequencies at high
sampling rates. The INP and INM pins must be externally biased around a common-mode voltage of 0.95 V,
available on the VCM pin. For a full-scale differential input, each input pin (INP, INN) must swing symmetrically
between VCM + 0.5 V and VCM – 0.5 V, resulting in a 2-V_PP differential input swing. The input sampling circuit
has a high 3-dB bandwidth that extends up to 500 MHz (measured from the input pins to the sampled voltage).
S
SZ
L_PKG
2 nH
INP
C_BOND
0.5 pF
R_ESR
200 W
L_PKG
2 nH
INN
C_BOND
0.5 pF
R_ESR
200 W
15 W
1 kW
VCM
1 kW
15 W
R_ON
25 W
C_PAR3
0.3 pF
R_ON
100 W
Sampling
S _Switch
Sampling
Capacitor
R_ON
10 W
C_PAR2
1 pF
C_SAMP
2.6 pF
C_PAR1
1.5 pF
R_ON
10 W
S
Sampling
Switch
R_ON
25 W
S
R_ON
40 W
C_SAMP
2.6 pF
C_{PAR2 Sampling}
1 pF _Capacitor
C_PAR3
0.3 pF
R_ON
100 W
SZ
Figure 46. Analog Input Equivalent Circuit
58
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