MSC1202Y3RHHTG4 Datasheet, PDF (54/92 Pages) Texas Instruments –
Precision Analog-to-Digital Converter and Current-Output Digital-to-Analog Converter

MSC1200
MSC1201
MSC1202
SBAS317E − APRIL 2004 − REVISED MAY 2006
www.ti.com
I²C Control (I2CCON)
SFR 9Ah
7
SBIT3
6
SBIT2
5
SBIT1
4
SBIT0
3
STOP
2
START
1
DCS
0
CNTSEL
Reset Value
00h
SBIT3−0
bits 7−4
Serial Bit Count. Number of bits transferred (read-only).
SBIT3:0
0x00
0x01
0x03
0x02
0x06
0x07
0x05
0x04
0x0C
COUNT
0
1
2
3
4
5
6
7
8
STOP
bit 3
Stop-Bit Status.
0: No stop
1: Stop condition received and I2C (bit 3, SFR A7h) set (cleared on write to I2CDATA)
START
bit 2
Start-Bit Status.
0: No stop
1: Start or repeated start condition received and I2C (bit 3, SFR A7h) set (cleared on write to I2CDATA)
DCS
bit 1
Disable Serial Clock Stretch.
0: Enable SCL stretch (cleared by firmware or START condition)
1: Disable SCL stretch
CNTSEL
bit 0
Counter Select.
0: Counter IRQ set for bit counter = 8 (default)
1: Counter IRQ set for bit counter = 1
SPI Data (SPIDATA) / I²C Data (I2CDATA)
7
6
5
4
3
2
1
SFR 9Bh
0
Reset Value
00h
SPIDATA
bits 7−0
SPI Data. Data for SPI is read from or written to this location. The SPI transmit and receive buffers are
separate registers, but both are addressed at this location. Read to clear the receive interrupt and write to clear the
transmit interrupt.
I2CDATA I2C Data. Data for I²C is read from or written to this location. The I²C transmit and receive buffers are
bits 7−0 separate registers, but both are addressed at this location.
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