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AM3894CCYG120 Datasheet, PDF (53/308 Pages) Texas Instruments – AM389x Sitara ARM Processors
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AM3894
AM3892
SPRS681E – OCTOBER 2010 – REVISED JULY 2012
3.2.3 Ethernet Media Access Controller (EMAC) Signals
SIGNAL
NAME
MDIO_MCLK
MDIO_MDIO
EMAC[0]_COL
EMAC[0]_CRS
EMAC[0]_GMTCLK
EMAC[0]_RXCLK
EMAC[0]_RXD[7]
EMAC[0]_RXD[6]
EMAC[0]_RXD[5]
EMAC[0]_RXD[4]
EMAC[0]_RXD[3]
EMAC[0]_RXD[2]
EMAC[0]_RXD[1]
EMAC[0]_RXD[0]
EMAC[0]_RXDV
EMAC[0]_RXER
EMAC[0]_TXCLK
Table 3-4. EMAC Terminal Functions
NO.
AH37
AH36
AB25
AA25
AC37
AE37
AE36
AC25
AD25
AC35
AD35
AC36
AD36
AD37
AE35
AE34
AF37
TYPE (1) OTHER(2) (3)
MUXED
DESCRIPTION
O
PULL: IPU / IPU
DRIVE: H / H
DVDD_3P3
-
PINCTRL275
Management Data Serial Clock output
I/O
PULL: IPU / IPU
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL276
Management Data I/O
EMAC0
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL251
[G]MII Collision Detect (Sense) input
I
PULL: IPD / IPD
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL252
[G]MII Carrier Sense input
O
PULL: IPD / DIS
DRIVE: L / L
DVDD_3P3
-
PINCTRL253
GMII Source Asynchronous Transmit Clock
I
PULL: IPU / IPU
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL254
[G]MII Receive Clock
-
PINCTRL262
-
PINCTRL261
-
PINCTRL260
I
PULL: IPU / IPU
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL259
-
PINCTRL258
[G]MII Receive Data [7:0]. For 1000 EMAC GMII
operation, EMAC[0]_RXD[7:0] are used. For 10/100
EMAC MII operation, only EMAC[0]_RXD[3:0] are
used.
-
PINCTRL257
-
PINCTRL256
-
PINCTRL255
I
PULL: IPU / IPU
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL263
[G]MII Receive Data Valid input
I
PULL: IPU / IPU
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL264
[G]MII Receive Data Error input
I
PULL: IPD / DIS
DRIVE: Z / Z
DVDD_3P3
-
PINCTRL265
[G]MII Transmit Clock input
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2) PULL: A / B, where:
A is the state of the internal pull resistor during POR reset
B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset
IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled
DRIVE: A / B, where;
A is the driving state of the pin during POR reset
B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset
H = Driving High, L = Driving Low, Z = 3-State
For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see
Section 4.2.1, Pullup/Pulldown Resistors.
(3) Specifies the operating I/O supply voltage for each signal.
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