TLC320AD57C Datasheet, PDF (5/21 Pages) Texas Instruments – Sigma-Delta Stereo Analog-to-Digital Converter

1 Introduction
The TLC320AD57C provides high-resolution signal conversion from analog to digital using oversampling
sigma-delta technology. This device consists of two synchronous conversion paths. Also included is a
decimation filter after the modulator as shown in the functional block diagram. Other functions provide
analog filtering and on-chip timing and control.
A functional block diagram of the TLC320AD57C is included in section 1.2. Each block is described in the
Detailed Description section.
1.1 Features
• Single 5-V Power Supply
• Sample Rates (f_s) up to 48 kHz
• 18-Bit Resolution
• Signal-to-Noise (EIAJ) of 97 dB
• Dynamic Range of 95 dB
• Total Signal-to-Noise+Distortion of 91 dB
• Internal Reference Voltage (V_ref)
• Serial Port Interface
• Differential Architecture
• Power Dissipation of 200 mW. Power-Down Mode for Low-Power Applications
• One Micron Advanced LinEPIC1Z™ Process
1.2 Functional Block Diagram
INLP
INLM
REFO
REFI
INRP
INRM
Sigma-Delta
Modulator
VREF
Decimation
Filter
High-Pass
Filter
Sigma-Delta
Modulator
Decimation
Filter
High-Pass
Filter
SI
en
rt
ie
ar
lf
a
c
e
DOUT
Fsync
LRClk
OSFR
OSFL
MCLK
CMODE
MODE0 – MODE2
Control
SCLK
LinEPIC1Z is a trademark of Texas Instruments Incorporated.
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