LM3668_15 Datasheet, PDF (5/30 Pages) Texas Instruments – 1-A, High-Efficiency Dual-Mode Single-Inductor Buck-Boost DC-DC Converter

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LM3668
SNVS449O – JUNE 2007 – REVISED APRIL 2015
7.4 Thermal Information
THERMAL METRIC⁽¹⁾
LM3668
DQB (WSON)
UNIT
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance, WSON package⁽²⁾
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
12 PINS
47.3
43..4
21.6
0.4
21.7
3.5
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Junction-to-ambient thermal resistance (R_θJA) is taken from a thermal modeling result, performed under the conditions and guidelines
set forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 101.6 mm x 76.2 mm x 1.6 mm.
Thickness of the copper layers are 2oz/1oz/1oz/2oz. The middle layer of the board is 60 mm x 60 mm. Ambient temperature in
simulation is 22°C, still air. Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications
where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design.
7.5 Electrical Characteristics
Unless otherwise noted, specifications apply to the LM3668. V_IN = 3.6 V = EN, V_OUT = 3.3 V. For V_OUT = 4.5V-5 V, V_IN =
4 V. ⁽¹⁾⁽²⁾
V_FB
I_LIM
I_SHDN
I_{Q_PFM}
PARAMETER
Feedback voltage
Switch peak current limit
Switch peak current limit
Shutdown supply current
Shutdown supply current
DC bias current in PFM
DC bias current in PFM
I_{Q_PWM}
R_DSON(P)
R_DSON(N)
F_OSC
F_SYNC
V_IH
DC bias current in PWM
DC bias current in PWM
Pin-pin resistance for PFET
Pin-pin resistance for NFET
Internal oscillator frequency
Sync frequency range
Logic high input for EN,
MODE/SYNC pins
TEST CONDITIONS
−40°C ≤ T_A ≤ 85°C, see⁽²⁾
Open loop⁽³⁾
Open loop⁽³⁾, −40°C ≤ T_A ≤ 85°C
EN = 0 V
EN = 0 V, −40°C ≤ T_A ≤ 85°C
No load, device is not switching (FB
forced higher than programmed output
voltage)
No load, device is not switching (FB
forced higher than programmed output
voltage)
−40°C ≤ T_A ≤ 85°C
PWM mode, no switching
PWM mode, no switching
−40°C ≤ T_A ≤ 85°C
Switches P1 and P2
Switches N1 and N2
PWM mode
PWM mode, −40°C ≤ T_A ≤ 85°C
V_IN = 3.6 V
−40°C ≤ T_A ≤ 85°C
MIN
–3%
1.6
1.9
1.6
1.1
TYP
MAX UNIT
3%
1.85
A
2.05
0.01
µA
1
45
µA
60
600
µA
750
130
180 mΩ
100
150 mΩ
2.2
MHz
2.5
2.7 MHz
V
V_IL
Logic low input for EN,
MODE/SYNC pins
−40°C ≤ T_A ≤ 85°C
0.4 V
I_{EN, MODE, EN, MODE/SYNC pins input current}
SYNC
−40°C ≤ T_A ≤ 85°C
0.3
µA
1
(1) All voltages with respect to SGND.
(2) Minimum and Maximum limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the
most likely norm.
(3) Electrical Characteristics table reflects open loop data (FB = 0 V and current drawn from SW pin ramped up until cycle-by-cycle current
limits is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current
until output voltage drops by 10%.
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