CDC339DBR Datasheet, PDF (5/13 Pages) Texas Instruments – CLOCK DRIVER WITH 3-STATE OUTPUTS

From Output
Under Test
CL = 50 pF
(see Note A)
CDC339
CLOCK DRIVER
WITH 3ĆSTATE OUTPUTS
SCAS331 − DECEMBER 1992 − REVISED MARCH 1994
PARAMETER MEASUREMENT INFORMATION
500 Ω
500 Ω
7V
S1
Open
GND
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
7V
Open
Timing Input
LOAD CIRCUIT
1.5 V
tw
Input 1.5 V
3V
3V
1.5 V
0V
0V
VOLTAGE WAVEFORMS
Data Input
tsu
th
1.5 V
3V
1.5 V
0V
VOLTAGE WAVEFORMS
Input
tPLH
Output
1.5 V
2V
0.8 V
tr
3V
1.5 V
0V
2V
1.5 V
tf
tPHL
VOH
0.8 V _VOL
VOLTAGE WAVEFORMS
Output
3V
Control
(low-level
1.5 V
1.5 V
enabling)
0V
tPZL
tPLZ
Output
Waveform 1
S1 at 7 V
(see Note C)
tPZH
Output
Waveform 2
S1 at Open
(see Note C)
1.5 V
tPHZ
1.5 V
3.5 V
VOL + 0.3 V
VOL
VOH
VOH − 0.3 V
≈0V
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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