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AMC7820 Datasheet, PDF (5/28 Pages) Texas Instruments – ANALOG MONITORING AND CONTROL
PIN DESCRIPTIONS (Refer to Figure 1, Block Diagram)
PIN
DESIGNATOR
DESCRIPTION
1
SW2_OUT
Output from SW2. This pin connects to OPA7_OUT when SW2 is enabled; connects to the output of SW3 when SW2 is disabled.
2
T_SENSOR_VOLTAGE Output of temperature sensor (Thermistor) voltage buffer.
3
OPA6_IN–
Inverting Input of OPA6
4
OPA6_OUT
Output of OPA6
5
OPA6_IN+
Noninverting Input of OPA6
6
DAC0_OUT
Output of DAC0
7
DAC0_OUT_SET
This pin determines the full-scale output of DAC0. When tied to DAC0_OUT, the full-scale output equals VREF. When
connected to AGND, full-scale output equals 2 • VREF.
8
OPA2_IN–
Inverting Input of OPA2
9
OPA2_OUT
Output of OPA2
10
OPA2_IN+
Noninverting Input of OPA2
11
OPA5_IN–
Inverting Input of OPA5
12
OPA5_OUT
Output of OPA5
13
OPA5_IN+
Noninverting Input of OPA5
14
OPA4_IN–
Inverting Input of OPA4
15
OPA4_OUT
Output of OPA4
16
OPA4_IN+
Noninverting Input of OPA4
17
DAC2_OUT
Output of DAC2
18
AGND
Analog Ground
19
AVDD
Analog Power Supply (+5V)
20
DAC2_OUT_SET
This pin determines the full-scale output of DAC2. When tied to DAC2_OUT, the full-scale output equals VREF. When
connected to AGND, full-scale output equals 2 • VREF.
21
DAC1_OUT_SET
This pin determines the full-scale output of DAC1. When tied to DAC1_OUT, the full-scale output equals VREF. When
connected to AGND, full-scale output equals 2 • VREF.
22
DAC1_OUT
Output of DAC1
23
OPA3_IN–
Inverting Input of OPA3
24
OPA3_OUT
Output of OPA3
25
OPA3_IN+
Noninverting Input of OPA3
26
REF_OUT_+2.5V
+2.5VOUT
27
EXT_REF_IN
An external reference can be connected here. Also can be used as a filter for internal reference.
28
SW1_OUT
Output from SW1. This pin connects to DAC2_OUT when SW1 is enabled; connects to AGND when SW1 is disabled.
29
OPA1_IN+
Noninverting Input of OPA1
30
OPA1_OUT
Output of OPA1
31
OPA1_IN–
Inverting Input of OPA1
32
CH5
Analog Input of Channel 5
33
CH4
Analog Input of Channel 4
34
CH3
Analog Input of Channel 3
35
CH2
Analog Input of Channel 2
36
RESET
Reset Input. Logic LOW on this pin will cause the part to perform a hardware reset.
37
SCLK
Serial Clock Input
38
MOSI
Master Out, Slave In. Digital data input for the serial interface.
39
MISO
Master In, Slave Out. Digital data output for the serial interface.
40
SS
Slave Select Input (active LOW). Data will not be clocked into MOSI unless SS is LOW. When SS is HIGH, MISO is
high impedance.
41
BVDD
Interface Power Supply. Connects to 3V for 3V logic; connects to 5V for 5V logic.
42
DVDD
Digital Power Supply (+5V)
43
DGND
Digital Ground
44
THERM_I_OUTPUT
Current source output to drive the thermistor.
45
ISET_RESISTOR
The resistor connected to this pin sets the current output from the pin THERM_I_OUTPUT.
46
OPA7_IN–
Inverting Input of OPA7
47
OPA7_OUT
Output of OPA7
48
OPA7_IN+
Noninverting Input of OPA7
AMC7820
5
SBAS231B
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