74AC11074 Datasheet, PDF (5/6 Pages) Texas Instruments – DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

74AC11074
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCAS499A – DECEMBER 1986 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
tw
Input
50%
50%
VCC
0V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
Timing Input
(see Note B)
tsu
Data Input
50% VCC
th
50% VCC
50% VCC
VCC
0V
VCC
0V
VOLTAGE WAVEFORMS
Input
(see Note B)
50% VCC
50% VCC
VCC
0V
tPLH
In-Phase
Output
tPHL
Out-of-Phase
Output
50% VCC
50% VCC
tPHL
VOH
50% VCC
VOL
tPLH
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5