TLV320AIC27 Datasheet, PDF (42/52 Pages) Texas Instruments – STEREO AUDIO CODEC

TLV320AIC27
STEREO AUDIO CODEC
SLAS253 – MARCH 2000
modem mode features (continued)
D Master volume control register maps to a location dependant on selected ID: ID 00 or 01 uses master
volume at register 02h, ID 10 uses 38h (surround volume), and ID 11 uses 36h (LFE, center volume). In
ID11, bits 7 and 15 act as left and right mute.
D Front DAC mute (reg18h) automatically demuted when ID is 1x. That is, it is used as surround DAC or
LFE/center when surround or LFE/center master volume is demuted.
D Rear DAC mute (reg70h) automatically demuted when 04h volume is demuted
D ADCs always use record level from register 1Ch
D In order to achieve the above functionality, the following changes to Rev 2.1 compliant, or quad mode,
defaults are made:
• Rev 2.1 legacy compliance switch is opened (can be closed using REV2SW bit in register 5Ah)
• Rear channel mixer PGA default is now permanently muted (it is unlikely that user will want to send the
analog mix output onto the Tx modem line output)
• Tx modem level at the LNLVL pins still controlled from 04h rather than 46h or 48h (which would normally
be the modem ADC and DAC level-control registers)
• Rx ADC input levels are still controlled from the normal ADC record level register 1Ch (rather than from
46h or 48h, due to the difficulty in reallocating left and right channel gain controls into two different
registers).
The AC’97 Rev 2.1 specification allows for provision of up to 16 programmable IO pins. Within the 48-pin TQFP
package used, provision has been made for three pins to be used as GPIO pins. These pins (numbers 43, 44,
and 48) are also used as I²S output pins to support multichannel operation.
When used as GPIO pins, pins 43, 44, and 48 are mapped onto bits 11, 12, and 13 in the ac-link slot 12. These
optional locations may be configured in any way: as inputs or outputs, as supporting interrupt operation, etc.,
offering maximum flexibility to the user. The appropriate GPIO control registers are supported to control these
pins.
Configuration of these pins as GPIO is explained in the control interface description.
modem registers (index 3Ch and 56h)
The contents of these registers control modem function
register 3Ch – extended modem ID
The extended modem ID is a read/write register that primarily identifies the enhanced codecs modem AFE
capabilities. The default value will depend on features and hardware configuration. Writing any value to this
register performs a warm modem AFE reset (register range 3C–56h), including GPIO (register range 4C–54h).
The warm reset causes all affected registers to revert to their default values. Note: for AMC ’97 parts the audio
and modem AFE should be logically independent (writes to register 0h resets audio only).
D LIN1 = 1 indicates first line is supported – set when TLV320AIC27 is in Modem mode1 = 1
D LIN2 = 1 indicates second line is supported – supported on TLV320AIC27 when DLM is set
D HSET = 1 indicates handset DAC/ADC is supported – not supported on TLV320AIC27
D CID1 = 1 indicates that caller ID decode for line1 is supported – not supported on TLV320AIC27
D CID2 = 1 indicates that caller ID decode for line2 is supported – not supported on TLV320AIC27
D ID1, ID0 is a two-bit field which indicates the codec configuration: primary is 00; secondary is 01, 10, or 11
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