TCM38C17IDL Datasheet, PDF (4/22 Pages) Texas Instruments – QComboE FOUR-CHANNEL QUAD PCM COMBO

TCM38C17IDL
QCombo™ FOUR-CHANNEL (QUAD) PCM COMBO
SLWS040C – JUNE 1996 – REVISED OCTOBER 1999
Terminal Functions (Continued)
TERMINAL
NAME
NO.
3PDN
33
0PWRO+
7
0PWRO –
9
1PWRO+
13
1PWRO –
15
2PWRO+
42
2PWRO –
40
3PWRO+
36
3PWRO –
34
RBIAS
1
REFLTR1
48
REFLTR2
47
RESET
26
VSS
18
I/O
DESCRIPTION
I Power-down select for channel 3. This channel of the device is inactive with a CMOS low-level input to 3PDN
and active with a CMOS high-level input to the terminal (digital).
O Noninverting output of channel 0 power amplifier. 0PWRO+can drive a 600 Ω || 100 pF load differentially
(analog).
O Inverting output of channel 0 power amplifier. 0PWRO – can drive a 600 Ω || 100 pF load differentially (analog).
O Noninverting output of channel 1 power amplifier. 1PWRO+ can drive a 600 Ω || 100 pF load differentially
(analog).
O Inverting output of channel 1 power amplifier. 1PWRO – can drive a 600 Ω || 100 pF load differentially (analog).
O Noninverting output of channel 2 power amplifier. 2PWRO+ can drive a 600 Ω || 100 pF load differentially
(analog).
O Inverting output of channel 2 power amplifier. 2PWRO – can drive a 600 Ω || 100 pF load differentially (analog).
O Noninverting output of channel 3 power amplifier. 3PWRO+ can drive a 600 Ω || 100 pF load differentially
(analog).
O Inverting output of channel 3 power amplifier, 3PWRO – can drive a 600 Ω || 100 pF load differentially (analog).
Bias current setting resistor. A 100 kΩ, ± 5% resistor should be connected between terminals RBIAS and AVSS
to set the bias current of the device.
Voltage reference. A 1-µF external decoupling capacitor should be connected from REFLTR1 to AVSS for
filtering purposes.
Voltage reference. A 1-µF external decoupling capacitor should be connected from REFLTR2 to AVSS for
filtering purposes.
I Reset. Reset for all internal registers is initiated when RESET is brought high (digital).
Substrate bias. VSS should be externally connected to AVSS.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)^†
Supply voltage range, V_DD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Input voltage range, V_I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Digital ground voltage range, V_O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Operating free-air temperature range, T_A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† _{Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and}
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Voltage values are with respect to AVSS.
recommended operating conditions (see Notes 2 and 3)
MIN NOM
MAX UNIT
Supply voltage, VDD
4.75
5
5.25 V
High-level input voltage, VIH
0.8 × VDD
V
Low-level input voltage, VIL
0.2 × VDD
V
Load resistance between PWRO+ and PWRO – (differential), RL
600
Ω
Load capacitance between PWRO+ and PWRO – (differential), CL
100 pF
Operating free-air temperature, TA
– 40
85 °C
NOTES: 2. To avoid possible damage to these CMOS devices and resulting reliability problems, the power-up procedure described in the device
power-up sequence paragraphs later in this document should be followed.
3. Voltages at analog inputs, outputs and the AVDD terminal are with respect to the AREF terminal. All other voltages are referenced
to the DVSS terminal unless otherwise noted.
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