SN74CBT3125_10 Datasheet, PDF (4/20 Pages) Texas Instruments – QUADRUPLE FET BUS SWITCH

SN74CBT3125
QUADRUPLE FET BUS SWITCH
SCDS021I − MAY 1995 − REVISED SEPTEMBER 2002
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
C_L = 50 pF
(see Note A)
500 Ω ^S1
500 Ω
7V
Open
GND
LOAD CIRCUIT
TEST
t_pd
t_PLZ/t_PZL
t_PHZ/t_PZH
S1
Open
7V
Open
Output
Control
1.5 V
3V
1.5 V
0V
Input
1.5 V
3V
1.5 V
0V
t_PLH
Output
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
t_PHL
1.5 V
V_OH
V_OL
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
t_PZL
t_PLZ
t_PZH
1.5 V
1.5 V
3.5 V
V_OL + 0.3 V
V_OL
t_PHZ
V_OH
V_OH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C_L includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r ≤ 2.5 ns, t_f ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t_PLZ and t_PHZ are the same as t_dis.
F. t_PZL and t_PZH are the same as t_en.
G. t_PLH and t_PHL are the same as t_pd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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