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MSP430FR573X Datasheet, PDF (4/64 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER | |||
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MSP430FR573x
MSP430FR572x
SLAS639 â APRIL 2011
Functional Block Diagram â
MSP430FR5721IRHA, MSP430FR5725IRHA, MSP430FR5729IRHA
MSP430FR5731IRHA MSP430FR5735IRHA, MSP430FR5739IRHA
PJ.4/XIN PJ.5/XOUT
DVCC DVSS VCORE AVCC AVSS
PA
PB
P1.x P2.x P3.x P4.x
Clock
System
ACLK
SMCLK
16 KB
(â5739, â5729)
8 KB
(â5735, â5725)
4 KB
(â5731, â5721)
MCLK
FRAM
Memory
Protection
Unit
1 KB
(â5739, â5735)
(â5729, â5725)
0.5 KB
(â5731, â5721)
RAM
CPUXV2
and
Working
Registers
MAB
MDB
Boot
ROM
Power
Management
SVS
SYS
Watchdog
REF
I/O Ports
P1/P2
2Ã8 I/Os
Interrupt
& Wakeup
PA
1Ã16 I/Os
I/O Ports
P3/P4
1Ã8 I/Os
1x 2 I/Os
Interrupt
& Wakeup
PB
1Ã10 I/Os
www.ti.com
DMA
3 Channel
RST/NMI/SBWTDIO
TEST/SBWTCK
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
EEM
(S: 3+1)
JTAG/
SBW
Interface
MPY32
TA0
TB0
TA1
TB1
TB2
(2) Timer_A (3) Timer_B
3 CC
3 CC
Registers Registers
RTC_B
CRC
eUSCI_A0:
UART,
IrDA, SPI
eUSCI_B0:
SPI, I2C
eUSCI_A1:
UART,
IrDA, SPI
ADC10_B
10 Bit
200KSPS
Comp_D
16 channels
16 channels
(12 ext/2 int)
Functional Block Diagram â
MSP430FR5723IRHA, MSP430FR5727IRHA
MSP430FR5733IRHA, MSP430FR5737IRHA
PJ.4/XIN PJ.5/XOUT
DVCC DVSS VCORE AVCC AVSS
Clock
System
ACLK
SMCLK
16 KB
(â5737, â5727)
8 KB
(â5733, â5723)
MCLK
FRAM
Memory
Protection
Unit
1 KB
(â5737, â5733)
(â5727, â5723)
RAM
CPUXV2
and
Working
Registers
MAB
MDB
Boot
ROM
Power
Management
SVS
SYS
Watchdog
PA
PB
P1.x P2.x P3.x P4.x
I/O Ports
P1/P2
2Ã8 I/Os
Interrupt
& Wakeup
PA
1Ã16 I/Os
I/O Ports
P3/P4
1Ã8 I/Os
1x 2 I/Os
Interrupt
& Wakeup
PB
1Ã10 I/Os
DMA
3 Channel
RST/NMI/SBWTDIO
TEST/SBWTCK
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
EEM
(S: 3+1)
JTAG/
SBW
Interface
MPY32
TA0
TB0
TA1
TB1
TB2
(2) Timer_A (3) Timer_B
3 CC
3 CC
Registers Registers
RTC_B
CRC
eUSCI_A0:
UART,
IrDA, SPI
eUSCI_A1:
UART,
IrDA, SPI
eUSCI_B0:
SPI, I2C
Comp_D
16 channels
4
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