MSP430C32X Datasheet, PDF (4/33 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430C32x, MSP430P325A
MIXED SIGNAL MICROCONTROLLER
SLAS219B – MARCH 1999 – REVISED MARCH 2000
short-form description
processing unit
The processing unit is based on a consistent and orthogonally-designed CPU and instruction set. This design
structure results in a RISC-like architecture, highly transparent to the application development and is
distinguished due to ease of programming. All operations other than program-flow instructions are
consequently performed as register operations in conjunction with seven addressing modes for source and four
modes for destination operand.
CPU
Program Counter
PC/R0
Sixteen registers are located inside the CPU,
providing reduced instruction execution time. This
reduces a register-register operation execution
time to one cycle of the processor frequency.
Four of the registers are reserved for special
use as a program counter, a stack pointer, a status
register and a constant generator. The remaining
registers are available as general-purpose
registers.
Stack Pointer
SP/R1
Status Register
SR/CG1/R2
Constant Generator
CG2/R3
General-Purpose Register R4
General-Purpose Register R5
Peripherals are connected to the CPU using a
data address and control bus and can be handled
easily with all instructions for memory
manipulation.
instruction set
General-Purpose Register R14
General-Purpose Register R15
The instruction set for this register-register architecture provides a powerful and easy-to-use assembler
language. The instruction set consists of 51 instructions with three formats and seven addressing modes.
Table 1 provides a summation and example of the three types of instruction formats; the addressing modes are
listed in Table 2.
Table 1. Instruction Word Formats
Dual operands, source-destination
Single operands, destination only
Relative jump, un-/conditional
e.g. ADD R4, R5
e.g. CALL R8
e.g. JNE
R4 + R5 → R5
PC → (TOS), R8 → PC
Jump-on equal bit = 0
Each instruction that operates on word and byte data is identified by the suffix B.
Examples:
Instructions for word operation
MOV EDE, TONI
ADD
#235h, &MEM
PUSH R5
SWPB R5
Instructions for byte operation
MOV.B EDE, TONI
ADD.B #35h, &MEM
PUSH.B R5
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