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LP38842-ADJ_15 Datasheet, PDF (4/15 Pages) Texas Instruments – 1.5A Ultra Low Dropout Adjustable Linear Regulators Stable with Ceramic Output Capacitors
LP38842-ADJ
SNVS304A – FEBRUARY 2005 – REVISED APRIL 2013
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ELECTRICAL CHARACTERISTICS(1)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = VO(NOM) + 1V, VBIAS = 4.5V, IL = 10 mA, CIN = 10 µF CER, COUT = 22 µF CER, VS/D = VBIAS.
Min/Max limits are specified through testing, statistical correlation, or design.
Symbol
Parameter
Conditions
MIN
TYP (2)
MAX
Units
VADJ
IADJ
ΔVO/ΔVIN
ΔVO/ΔIL
VDO
Adjust Pin Voltage
Adjust Pin Bias Current
Output Voltage Line Regulation (3)
Output Voltage Load Regulation (4)
Dropout Voltage (5)
10 mA < IL < 1.5A
VO(NOM) + 1V ≤ VIN ≤ 5.5V
4.5V ≤ VBIAS ≤ 5.5V
10 mA < IL < 1.5A
VO(NOM) + 1V ≤ VIN ≤ 5.5V
4.5V ≤ VBIAS ≤ 5.5V
VO(NOM) + 1V ≤ VIN ≤ 5.5V
10 mA < IL < 1.5A
IL = 1.5A
0.552
0.543
0.56
0.568
0.577
V
1
µA
0.01
%/V
0.1
0.4
1.1
%/A
115
175
315
mV
IQ(VIN)
Quiescent Current Drawn from VIN
Supply
10 mA < IL < 1.5A
30
35
40
mA
VS/D ≤ 0.3V
0.06
1
30
µA
IQ(VBIAS)
Quiescent Current Drawn from VBIAS 10 mA < IL < 1.5A
Supply
2
4
6
mA
VS/D ≤ 0.3V
0.03
1
30
µA
UVLO
VBIAS Voltage Where Regulator
Output Is Enabled
3.8
V
ISC
Short-Circuit Current
Shutdown Input
VOUT = 0V
4
A
VSDT
Output Turn-off Threshold
Output = ON
Output = OFF
0.7
1.3
V
0.3
0.7
Td (OFF)
Td (ON)
IS/D
θJ-A
Turn-OFF Delay
Turn-ON Delay
S/D Input Current
Junction to Ambient Thermal
Resistance
RLOAD X COUT << Td (OFF)
RLOAD X COUT << Td (ON)
VS/D =1.3V
VS/D ≤ 0.3V
SO PowerPAD-8 Package (6)
20
µs
15
1
µA
−1
43
°C/W
AC Parameters
PSRR (VIN)
PSRR (VBIAS)
Ripple Rejection for VIN Input Voltage
Ripple Rejection for VBIAS Voltage
Output Noise Density
VIN = VOUT +1V, f = 120 Hz
VIN = VOUT + 1V, f = 1 kHz
VBIAS = VOUT + 3V, f = 120 Hz
VBIAS = VOUT + 3V, f = 1 kHz
f = 120 Hz
80
65
dB
58
58
1
µV/root−
Hz
en
Output Noise Voltage
VOUT = 1.5V
BW = 10 Hz − 100 kHz
BW = 300 Hz − 300 kHz
150
µV (rms)
90
(1) If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to
ground.
(2) Typical numbers represent the most likely parametric norm for 25°C operation.
(3) Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
(4) Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load
to full load.
(5) Dropout voltage is defined as the minimum input to output differential required to maintain the output with 2% of nominal value.
(6) For optimum heat dissipation, the ground pad must be soldered to a copper plane or connected using vias to an internal copper plane.
4
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