LP38690_15 Datasheet, PDF (4/31 Pages) Texas Instruments – LP38690, LP38692 1-A Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors

LP38690, LP38692
SNVS322L – DECEMBER 2004 – REVISED MARCH 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) ⁽¹⁾
V(max) All pins (with respect to GND)
I_OUT ⁽²⁾
Junction temperature
Lead temperature (soldering, 5 seconds)
Power dissipation⁽³⁾
Storage temperature, T_stg
MIN
MAX
–0.3
12
Internally limited
−40
150
260
Internally limited
–65
150
UNIT
V
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to
ground.
(3) At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a
heatsink is used). When using the WSON package, refer to TI Application Report AN-1187 Leadless Leadframe Package (LLP)
(SNOA401) and the WSON Mounting section in this datasheet. If power dissipation causes the junction temperature to exceed specified
limits, the device goes into thermal shutdown.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
VALUE
±2000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V_IN supply voltage
Operating junction temperature
MIN
NOM
MAX UNIT
2.7
10
V
−40
125
°C
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
LP38690
TO-252
LP38690/92
WSON
LP38692
SOT-223
UNIT
R_θJA ⁽²⁾
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
3 PINS
50.5
52.6
29.7
4.8
29.3
1.5
6 PINS
50.6
44.4
24.9
0.4
25.1
5.4
5 PINS
68.5
52.2
13.0
5.5
12.8
n/a
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Junction-to-ambient thermal resistance, High-K.
4
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: LP38690 LP38692