DRV591 Datasheet, PDF (4/16 Pages) Texas Instruments – 3-A HIGH-EFFICIENCY PWM POWER DRIVER

DRV591
SLOS389A – NOVEMBER 2001– REVISED MAY 2002
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Terminal Functions
TERMINAL
NAME
NO.
AGND
2
I/O
Analog ground
DESCRIPTION
AREF
5
O Connect 1 µF capacitor to ground for AREF voltage filtering
AVDD
1
I Analog power supply
COSC
4
I Connect capacitor to ground to set oscillation frequency (220 pF for 500 kHz, 1 nF for 100 kHz) when the internal
oscillator is selected; connect clock signal when an external oscillator is used
FAULT0
10 O Fault flag 0, low when active open drain output (see application information)
FAULT1
9
O Fault flag 1, high when active open drain output (see application information)
FREQ
Selects 500 kHz switching frequency when a TTL logic low is applied to this terminal; selects 100 kHz switching
32
I frequency when a TTL logic high is applied
IN–
7
I Negative differential input
IN+
6
I Positive differential input
INT/EXT
31
I Selects the internal oscillator when a TTL logic high is applied to this terminal; selects the use of an external oscil-
lator when a TTL logic low is applied to this terminal
OUT–
14, 15, O Negative bridge-tied load (BTL) output (4 pins)
16, 17
OUT+
24, 25, O Positive bridge-tied load (BTL) output (4 pins)
26, 27
PGND
18, 19,
20, 21,
22, 23
High-current ground (6 pins)
PVDD
11, 12, I High-current power supply (6 pins)
13, 28,
29, 30
ROSC
3
I Connect 120-kΩ resistor to AGND to set oscillation frequency (either 500 kHz or 100 kHz). Not needed if an
external clock is used.
SHUTDOWN
8
I Places the amplifier in shutdown mode when a TTL logic low is applied to this terminal; places the amplifier
in normal operation when a TTL logic high is applied
4