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CD74HC75 Datasheet, PDF (4/8 Pages) Texas Instruments – Dual 2-Bit Bistable Transparent Latch
◁
CD74HC75, CD74HCT75
DC Electrical Specifications (Continued)
PARAMETER
Quiescent Device
Current
TEST
CONDITIONS
25oC
SYMBOL VI (V) IO (mA) VCC (V) MIN
ICC
VCC or
0
GND
6
-
TYP MAX
-
4
-40oC TO 85oC
MIN MAX
-
40
HCT TYPES
High Level Input
Voltage
VIH
-
-
4.5 to 2
-
-
2
-
5.5
Low Level Input
Voltage
VIL
-
-
4.5 to -
- 0.8
-
0.8
5.5
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
VOH
VIH or
-
4.5 4.4 -
-
4.4
-
VIL
-0.02
4.5 3.98 -
-
3.84
-
Low Level Output
VOL
VIH or
-4
4.5
-
- 0.1
-
0.1
Voltage CMOS Loads
VIL
Low Level Output
Voltage
TTL Loads
0.02
4.5
-
- 0.26
-
0.33
Input Leakage
Current
II
VCC
4
5.5
-
and
GND
±0.1
-
±1
Quiescent Device
Current
ICC
VCC or
0
5.5
-
-
4
-
40
GND
Additional Quiescent
∆ICC
VCC
-
4.5 to - 100 360
-
450
Device Current Per
(Note 4) - 2.1
5.5
Input Pin: 1 Unit Load
NOTE:
4. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.
-55oC TO 125oC
MIN MAX UNITS
-
80
µA
2
-
V
-
0.8
V
4.4
-
V
3.7
-
V
-
0.1
V
-
0.4
V
-
±1
µA
-
80
µA
-
490
µA
HCT Input Loading Table
INPUT
UNIT LOADS
D0, D1
0.8
1E, 2E
1.2
NOTE: Unit Load is ∆ICC limit
tions table, e.g., 360µA max at
specified
25oC.
in
DC
Electrical
Specifica-
Prerequisite For Switching Specifications
PARAMETER
TEST
VCC
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
Pulse Width Enable Input
tW
-
2 80 -
-
100
-
120
-
ns
4.5 16 -
-
20
-
24
-
ns
6 14 -
-
17
-
20
-
ns
Setup Time D to Enable
tSU
-
2 60 -
-
75
-
90
-
ns
4.5 12 -
-
15
-
18
-
ns
6 10 -
-
13
-
15
-
ns
4
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