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CD74FCT823A Datasheet, PDF (4/7 Pages) Texas Instruments – BiCMOS FCT Interface Logic, 9-Bit D-Type Flip-Flops, Three-State
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CD74FCT823A, CD74FCT824A
Switching Specifications Over Operating Range FCT Series tr, tf = 2.5ns, CL = 50pF, RL (Figure 1)
25oC
0oC TO 70oC
Propagation Delays
PARAMETER
SYMBOL VCC (V) TYP
MIN
MAX
(Note 6)
Clock to Q
Clock to Q
MR to Q
Output Enable to Q
Output Disable to Q
Output Enable to Q
Output Disable to Q
Power Dissipation Capacitance
CD74FCT823A
tPLH, tPHL
5
7.5
1.5
10
CD74FCT824A
tPLH, tPHL
5
7.5
1.5
10
tPHL
5
10.5
1.5
14
CD74FCT823A
tPZL, tPZH
5
9
1.5
12
CD74FCT823A
tPLZ, tPHZ
5
6
1.5
8
CD74FCT824A
tPZL, tPZH
5
9
1.5
12
CD74FCT824A
tPLZ, tPHZ
5
6
1.5
8
CPD
-
-
-
-
(Note 7)
Minimum (Valley) VOHV During Switching of
Other Outputs (Output Under Test Not Switching)
VOHV
5
0.5
-
-
Maximum (Peak) VOLP During Switching of
Other Outputs (Output Under Test Not Switching)
VOLP
5
1
-
-
Input Capacitance
CI
-
-
-
10
Three-State Output Capacitance
CO
-
-
-
15
NOTES:
6. 5V: Minimum is at 5.25V for 0oC to 70oC, Maximum is at 4.75V for 0oC to 70oC, Typical is at 5V.
7.
CPD, measured per
PD (per package) =
flip-flop, is used to determine the
VCC ICC + Σ(VCC2 fI CPD + VO2
dynamic power consumption.
fOCL + VCC ∆ICC D) where:
VCC = supply voltage
∆ICC = flow through current x unit load
CL = output load capacitance
D = duty cycle of input high
fO = output frequency
fI = input frequency
UNITS
ns
ns
ns
ns
ns
ns
ns
pF
V
V
pF
pF
Prerequisite for Switching
PARAMETER
Maximum Clock Frequency
SYMBOL
fMAX
Master Reset Recovery Time
tREC
Setup Time, Data to Clock, CE to Clock
tSU
Hold Time - Data, CE
tH
Pulse Width - Clock, MR
tW
NOTE:
8. 5V: Minimum is at 4.75V for 0oC to 70oC, Typical is at 5V.
VCC (V)
5
(Note 8)
5
5
5
5
25oC
TYP
-
-
-
-
-
0oC TO 70oC
MIN
MAX
70
-
7
-
4
-
2
-
7
-
UNITS
MHz
ns
ns
ns
ns
8-4
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