CD74FCT564 Datasheet, PDF (4/5 Pages) Texas Instruments – BiCMOS FCT Interface Logic, Octal D-Type Flip-Flops, Three-State

CD74FCT564, CD74FCT574
Switching Specifications Over Operating Range t_r, t_f = 2.5ns, C_L = 50pF, R_L - See Figure 4
AMBIENT TEMPERATURE (T_A)
25^oC
0^oC TO 70^oC
PARAMETER
Propagation Delays
SYMBOL V_CC (V)
TYP
MIN
MAX
Clock to Q
Clock to Q
Output Disable to Q
Output Enable to Q
Output Disable to Q
Output Enable to Q
Power Dissipation Capacitance
CD74FCT574
t_PLH, t_PHL
5
CD74FCT564
t_PLH, t_PHL
5
CD74FCT574
t_PLZ, t_PHZ
5
CD74FCT574
t_PZL, t_PZH
5
CD74FCT564
t_PLZ, t_PHZ
5
CD74FCT564
t_PZL, t_PZH
5
C_PD
-
(Note 6)
6.6
2
10
6.6
1.5
10
6
1.5
8
9
1.5
12.5
6
1.5
8
9
1.5
12.5
34 Typical
Minimum (Valley) V_OHV During Switching of
Other Outputs (Output Under Test Not Switching)
V_OHV
5
0.5
-
-
(Figure 1)
Maximum (Peak) V_OLP During Switching of
Other Outputs (Output Under Test Not Switching)
V_OLP
5
1
-
-
(Figure 1)
Input Capacitance
C_I
-
-
Three State Output Capacitance
C_O
-
-
NOTE:
6.
C_PD, measured per
PD (per package) =
flip-flop, is used to determine the
V_CC I_CC + Σ(V_CC2 f_I C_PD + V_O2
dynamic power consumption.
to C_L + V_CC ∆I_CC D) where:
V_CC = supply voltage
∆I_CC = flow through current x unit load
C_L = output load capacitance
D = duty cycle of input high
f_O = output frequency
f_I = input frequency
-
10
-
15
Prerequisite For Switching
UNITS
ns
ns
ns
ns
ns
ns
pF
V
V
pF
pF
PARAMETER
SYMBOL
Clock Pulse Width
CD74FCT574
t_W
CD74FCT564
t_W
Setup Time Data to Clock
t_SU
Data to Clock Hold Time
CD74FCT574
t_H
CD74FCT564
t_H
Maximum Clock Frequency
f_MAX
NOTE:
7. 5V: minimum is at 4.5V.
5V: minimum is at 4.75V for 0^oC to 70^oC.
Typical is at 5V.
V_CC (V)
5 (Note 7)
5
5
5
5
5
AMBIENT TEMPERATURE (T_A)
25^oC
0^oC TO 70^oC
TYP
MIN
MAX
7
-
7
-
2
-
2
-
2
-
70
-
UNITS
ns
ns
ns
ns
ns
MHz
8-4