CD74FCT564 Datasheet, PDF (1/5 Pages) Texas Instruments – BiCMOS FCT Interface Logic, Octal D-Type Flip-Flops, Three-State

Data sheet acquired from Harris Semiconductor
SCHS259
January 1997
Features
• Buffered Inputs
NOFO_U^T_sRRe ^E_CNCMEO^OW_S^MD_T^M_e^E_c^E_h^SN_n^I_o^GD_lo^NE_g^SD_y
• Typical Propagation Delay: 5.6ns at V_CC = 5V,
T_A = 25^oC
• Positive Edge Triggered
• CD74FCT564
- Inverting
• CD74FCT574
- Noninverting
• SCR Latchup Resistant BiCMOS Process and
Circuit Design
• Speed of Bipolar FAST™/AS/S
• 48mA Output Sink Current
• Output Voltage Swing Limited to 3.7V at V_CC = 5V
• Controlled Output Edge Rates
• Input/Output Isolation to V_CC
• BiCMOS Technology with Low Quiescent Power
Pinouts
CD74FCT564
(PDIP, SOIC, SSOP)
TOP VIEW
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 V_CC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
CD74FCT564,
CD74FCT574
BiCMOS FCT Interface Logic,
Octal D-Type Flip-Flops, Three-State
Description
The CD74FCT564 and CD74FCT574 are octal D-Type,
three-state, positive edge triggered flip-flops which use a
small geometry BiCMOS technology. The output stage is a
combination of bipolar and CMOS transistors that limits the
output HIGH level to two diode drops below V_CC. This result-
ant lowering of output swing (0V to 3.7V) reduces power bus
ringing (a source of EMI) and minimizes V_CC bounce and
ground bounce and their effects during simultaneous output
switching. The output configuration also enhances switching
speed and is capable of sinking 48 milliamperes.
The eight flip-flops enter data into their registers on the LOW
to HIGH transition of the clock (CP). The Output Enable (OE)
controls the three state outputs and is independent of the
register operation. When the Output Enable (OE) is HIGH,
the outputs are in the high impedance state. The
CD74FCT564 and CD74FCT574 share the same configura-
tions; the CD74FCT564, however, has inverted outputs and
the CD74FCT574 has noninverted outputs.
Ordering Information
PART NUMBER
TEMP.
RANGE (^oC) PACKAGE
PKG.
NO.
CD74FCT564E
0 to 70 20 Ld PDIP E20.3
CD74FCT574E
0 to 70 20 Ld PDIP E20.3
CD74FCT564M
0 to 70 20 Ld SOIC M20.3
CD74FCT574M
0 to 70 20 Ld SOIC M20.3
CD74FCT574SM
0 to 70 20 Ld SSOP M20.209
NOTE: When ordering the suffix M and SM packages, use the entire
part number. Add the suffix 96 to obtain the variant in the tape and reel.
CD74FCT574
(PDIP, SOIC, SSOP)
TOP VIEW
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 V_CC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a trademark of Fairchild Semiconductor.
Copyright © Harris Corporation 1997
8-1
File Number 2295.2