CD54HC32_07 Datasheet, PDF (4/13 Pages) Texas Instruments – High-Speed CMOS Logic Quad 2-Input OR Gate

CD54HC32, CD74HC32, CD54HCT32, CD74HCT32
DC Electrical Specifications (Continued)
PARAMETER
HCT TYPES
High Level Input
Voltage
SYMBOL
TEST
CONDITIONS
25^oC
V_I (V) I_O (mA) V_CC (V) MIN TYP MAX
V_IH
-
-
4.5 to 2
-
-
5.5
Low Level Input
Voltage
V_IL
-
-
4.5 to -
- 0.8
5.5
High Level Output
Voltage
CMOS Loads
V_OH
V_IH or -0.02
4.5
4.4
-
-
V_IL
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
-4
4.5 3.98 -
-
V_OL
V_IH or -0.02
4.5
-
- 0.1
V_IL
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
4
4.5
-
- 0.26
I_I
V_CC
-
5.5
-
and
GND
±0.1
Quiescent Device
Current
I_CC
V_CC or
0
GND
Additional Quiescent
∆I_CC
V_CC
-
Device Current Per
(Note 2) -2.1
Input Pin: 1 Unit Load
5.5
-
-
2
4.5 to - 100 360
5.5
-40^oC TO 85^oC
MIN MAX
2
-
-
0.8
4.4
-
3.84
-
-
0.1
-
0.33
-
±1
-
20
-
450
-55^oC TO 125^oC
MIN MAX UNITS
2
-
V
-
0.8
V
4.4
-
V
3.7
-
V
-
0.1
V
-
0.4
V
-
±1
µA
-
40
µA
-
490
µA
NOTE:
2. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
UNIT LOADS
All
1.5
NOTE: Unit Load is
Specifications table,
∆I_CC
e.g.,
limit specified
360µA max at
in DC
25^oC.
Electrical
Switching Specifications Input t_r, t_f = 6ns
PARAMETER
TEST
V_CC
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
Propagation Delay, Input to
t_PLH, t_PHL C_L = 50pF
2
-
- 90
-
115
-
135
ns
Output (Figure 1)
4.5 -
-
18
-
23
-
27
ns
6
-
- 15
-
20
-
23
ns
Propagation Delay, Data Input to t_PLH, t_PHL C_L = 15pF
5
-7
-
-
-
-
-
ns
Output Y
Transition Times (Figure 1)
t_TLH, t_THL C_L = 50pF
2
-
- 75
-
95
-
110
ns
4.5 -
-
15
-
19
-
22
ns
6
-
- 13
-
16
-
19
ns
4