CD54HC192_1 Datasheet, PDF (4/21 Pages) Texas Instruments – High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

CD54/74HC192, CD54/74HC193, CD54/74HCT193
DC Electrical Specifications (Continued)
TEST
CONDITIONS
25^oC
-40^oC TO 85^oC
PARAMETER
HCT TYPES
SYMBOL V_I (V) I_O (mA) V_CC (V) MIN TYP MAX MIN
MAX
High Level Input
Voltage
V_IH
-
-
4.5 to 2
-
-
2
-
5.5
Low Level Input
Voltage
V_IL
-
-
4.5 to -
- 0.8
-
0.8
5.5
High Level Output
Voltage
CMOS Loads
V_OH
V_IH or -0.02
4.5
4.4
-
-
4.4
-
V_IL
High Level Output
Voltage
TTL Loads
-4
4.5 3.98 -
-
3.84
-
Low Level Output
Voltage
CMOS Loads
V_OL
V_IH or 0.02
4.5
-
- 0.1
-
0.1
V_IL
Low Level Output
Voltage
TTL Loads
4
4.5
-
- 0.26
-
0.33
Input Leakage
Current
I_I
V_CC to
-
5.5
-
- ±0.1
-
±1
GND
Quiescent Device
Current
I_CC
V_CC or
-
5.5
-
-
8
-
80
GND
Additional Quiescent
∆I_CC
V_CC
-
4.5 to - 100 360
-
450
Device Current Per
(Note 2) - 2.1
5.5
Input Pin: 1 Unit Load
NOTE:
2. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
-55^oC TO 125^oC
MIN MAX UNITS
2
-
V
-
0.8
V
4.4
-
V
3.7
-
V
-
0.1
V
-
0.4
V
-
±1
µA
-
160
µA
-
490
µA
HCT Input Loading Table
INPUT
UNIT LOADS
P0-P3
0.4
MR
1.45
PL
0.85
CPU, CPD
1.45
NOTE: Unit Load is
Specifications table,
∆_{e.IgC.C3l6im0µ}itAspmeacxifieadt _2in5oDCC.
Electrical
4