BQ34Z950 Datasheet, PDF (4/28 Pages) Texas Instruments – SBS 1.1-COMPLIANT GAS GAUGE AND PROTECTION ENABLED WITH IMPEDANCE TRACK WITH OPTIONAL DQ INTERFACE

bq34z950
SLUSBF0A – APRIL 2013 – REVISED MAY 2013
www.ti.com
TERMINAL
NO.
NAME
1
DSG
2
PACK
3
VCC
4
ZVCHG
5
GPOD
6
PMS
7
VSS
8
REG33
9
TOUT
10
VCELL+
11
ALERT
12
NC
13
NC
14
TS1
15
NC
16
DQ
17
NC
18
SMBD
19
NC
20
SMBC
21
DISP
22
VSS
23
LED1
24
LED2
25
LED3
26
LED4
27
LED5
28
GSRP
29
GSRN
30
MRST
31
VSS
32
REG25
33
RBI
34
VSS
35
RESET
36
ASRN
37
ASRP
TERMINAL FUNCTIONS
I/O ⁽¹⁾
DESCRIPTION
O
IA, P
P
O
OD
I
P
P
P
—
OD
—
—
IA
—
I/OD
—
I/OD
—
I/OD
I
P
I
I
I
I
I
IA
IA
I
P
P
P
P
O
IA
IA
High side N-CH discharge FET gate drive
Battery pack input voltage sense input. It also serves as device wake up when device is in
SHUTDOWN mode.
Positive device supply input. Connect to the center connection of the CHG FET and DSG FET to
ensure device supply either from battery stack or battery pack input.
P-CH pre-charge FET gate drive
High voltage general purpose open drain output. Can be configured to be used in pre-charge
condition.
PRE-CHARGE mode setting input. Connect to PACK to enable 0-V precharge using charge FET
connected at CHG pin. Connect to VSS to disable 0 V pre-charge using charge FET connected at
CHG pin.
Negative supply voltage input. Connect all VSS pins together for operation of device.
3.3-V regulator output. Connect at least a 2.2-μF capacitor to REG33 and VSS.
Thermistor bias supply output
Internal cell voltage multiplexer and amplifier output. Connect a 0.1-μF capacitor to VCELL+ and
VSS.
Alert output. In case of short circuit condition, overload condition and watchdog time out this pin will
be triggered.
Not used—leave floating
Not used—leave floating
1^st Thermistor voltage input connection to monitor temperature
Not used—leave floating
Single-wire bidirectional DQ interface
Not used—leave floating
SMBus data open-drain bidirectional pin used to transfer address and data to and from the
bq34z950
Not used—leave floating
SMBus clock open-drain bidirectional pin used to clock the data transfer to and from the bq34z950
Display control for the LEDs. This pin is typically connected to VCC via a 100-kΩ resistor and a
push button switch connected to VSS.
Negative supply voltage input. Connect all VSS pins together for operation of device.
LED1 display segment that drives an external LED depending on the firmware configuration
LED2 display segment that drives an external LED depending on the firmware configuration
LED3 display segment that drives an external LED depending on the firmware configuration
LED4 display segment that drives an external LED depending on the firmware configuration
LED5 display segment that drives an external LED depending on the firmware configuration
Coulomb counter differential input. Connect to one side of the sense resistor.
Coulomb counter differential input. Connect to one side of the sense resistor.
Master reset input that forces the device into reset when held low. Must be held high for normal
operation. Connect to RESET for correct operation of device.
Negative supply voltage input. Connect all VSS pins together for operation of device.
2.5-V regulator output. Connect at least a 1-mF capacitor to REG25 and VSS.
RAM/Register backup input. Connect a capacitor to this pin and VSS to protect loss of
RAM/Register data in case of short circuit condition.
Negative supply voltage input. Connect all VSS pins together for operation of device.
Reset output. Connect to MSRT.
Short circuit and overload detection differential input. Connect to the sense resistor.
Short circuit and overload detection differential input. Connect to the sense resistor.
(1) I = Input, IA = Analog input, I/O = Input/output, I/OD = Input/Open-drain output, O = Output, OA = Analog output, P = Power
4
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