TMS320C6202 Datasheet, PDF (39/86 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

TMS320C6202, TMS320C6202B, TMS320C6203, TMS320C6204
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS104A – OCTOBER 1999 – REVISED MARCH 2000
INPUT AND OUTPUT CLOCKS (CONTINUED)
switching characteristics for CLKOUT2^† (see Figure 11)
NO.
PARAMETER
1 tc(CKO2)
Cycle time, CLKOUT2
2 tw(CKO2H) Pulse duration, CLKOUT2 high
3 tw(CKO2L)
Pulse duration, CLKOUT2 low
† _{P = 1/CPU clock frequency in ns.}
-200
-250
-300
MIN
MAX
2P – 0.7 2P + 0.7
P – 0.7
P + 0.7
P – 0.7
P + 0.7
UNIT
ns
ns
ns
1
2
CLKOUT2
3
Figure 11. CLKOUT2 Timings
switching characteristics for XFCLK^†‡ (see Figure 12)
NO.
PARAMETER
1 tc(XFCK)
Cycle time, XFCLK
2 tw(XFCKH) Pulse duration, XFCLK high
3 tw(XFCKL)
Pulse duration, XFCLK low
† _{P = 1/CPU clock frequency in ns.}
‡ _{D = 8, 6, 4, or 2; FIFO clock divide ratio, user-programmable}
-200
-250
-300
MIN
MAX
D * P – 0.7
D * P + 0.7
(D/2) * P – 0.7 (D/2) * P + 0.7
(D/2) * P – 0.7 (D/2) * P + 0.7
UNIT
ns
ns
ns
XFCLK
1
2
3
Figure 12. XFCLK Timings
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