ADS54T04 Datasheet, PDF (39/44 Pages) Texas Instruments – Dual Channel 12-Bit 500Msps Receiver and Feedback IC

ADS54T04
www.ti.com
SLAS917 – DECEMBER 2012
Register
Address
Register Data
A7-A0 in D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
hex
66
LVDS Output Bus A EN
D15-D10
0
1
D15
D14
D13
D12
D11-D10
LVDS Output Bus A EN
Default FFFF
Output is powered down
Output is enabled
Individual LVDS output pin power down for channel B
corresponds to TRDYP/N (pins G3, G4)
corresponds to HRESP/N (pins F3, F4)
SYNCOUTP/N (pins F1, F2)
Pins E3, E4 (no connect pins) which are not used and should be powered down for
power savings
corresponds to DB11-DB0
Register
Address
Register Data
A7-A0 in D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
hex
67
LVDS Output Bus B EN
D15-D10
0
1
D15
D14
D13
D12
D11-D10
LVDS Output Bus B EN
Default FFFF
Output is powered down
Output is enabled
Individual LVDS output pin power down for channel B
corresponds to TRDYP/N (pins G3, G4)
corresponds to HRESP/N (pins F3, F4)
SYNCOUTP/N (pins F1, F2)
Pins E3, E4 (no connect pins) which are not used and should be powered down for
power savings
corresponds to DB11-DB0
Copyright © 2012, Texas Instruments Incorporated
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