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TMS320C5515_101 Datasheet, PDF (38/160 Pages) Texas Instruments – TMS320C5515 Fixed-Point Digital Signal Processor
TMS320C5515
SPRS645A – JANUARY 2010 – REVISED MARCH 2010
www.ti.com
Table 3-14. LCD Bridge Terminal Functions (continued)
SIGNAL
TYPE(1) OTHER(2) (3) DESCRIPTION
NAME
NO.
LCD_D[6]/
GP[16]
N9 I/O/Z
IPD
DVDDIO
BH
This pin is multiplexed between LCD Bridge and GPIO.
For LCD Bridge, it is LCD data pin 6.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
LCD_D[5]/
GP[15]
P9 I/O/Z
IPD
DVDDIO
BH
This pin is multiplexed between LCD Bridge and GPIO.
For LCD Bridge, it is LCD data pin 5.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
LCD_D[4]/
GP[14]
N8 I/O/Z
IPD
DVDDIO
BH
This pin is multiplexed between LCD Bridge and GPIO.
For LCD Bridge, it is LCD data pin 4.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
LCD_D[3]/
GP[13]
N7 I/O/Z
IPD
DVDDIO
BH
This pin is multiplexed between LCD Bridge and GPIO.
For LCD Bridge, it is LCD data pin 3.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
LCD_D[2]/
GP[12]
P7 I/O/Z
IPD
DVDDIO
BH
This pin is multiplexed between LCD Bridge and GPIO.
For LCD Bridge, it is LCD data pin 2.
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
LCD_D[1]/
SPI_TX
N6 I/O/Z
DVDDIO
BH
This pin is multiplexed between LCD Bridge and SPI.
For LCD Bridge, it is LCD data pin 1.
Mux control via the PPMODE bits in the EBSR.
LCD_D[0]/
SPI_RX
P6 I/O/Z
DVDDIO
BH
This pin is multiplexed between LCD Bridge and SPI.
For LCD Bridge, it is LCD data pin 0.
Mux control via the PPMODE bits in the EBSR.
38
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