TMS320BC51 Datasheet, PDF(38/87 Page) Texas Instruments – DIGITAL SIGNAL PROCESSORS

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TMS320BC51 Datasheet, PDF (38/87 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

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TMS320C5x, TMS320LC5x

DIGITAL SIGNAL PROCESSORS

SPRS030A â APRIL 1995 â REVISED APRIL 1996

instruction set summary (continued)

Table 7. TMS320C5x Instruction Set Opcodes

ACCUMULATOR MEMORY REFERENCE INSTRUCTIONS

INSTRUCTION

MNEMONIC

OPCODE

Absolute value of ACC

Add ACCB to ACC with carry

Add to ACC with shift

Add to low ACC short immediate

Add to ACC long immediate with shift

Add to ACC with shift of 16

Add ACCB to ACC

Add to ACC with carry

Add to low ACC with sign extension suppressed

Add to ACC with shift specified by TREG1 [3 â 0]

AND ACC with data value

AND with ACC long immediate with shift

AND with ACC long immediate with shift of 16

AND ACCB with ACC

Barrel shift ACC right

Complement ACC

Store ACC in ACCB if ACC > ACCB

Store ACC in ACCB if ACC< ACCB

Exchange ACCB with ACC

Load ACC with ACCB

Load ACC with shift

Load ACC long immediate with shift

Load ACC with shift of 16

Load low word of ACC with immediate

Load low word of ACC

Load ACC with shift specified by TREG1 [3 â 0]

Load ACCL with memory-mapped register

Negate ACC

Normalize ACC

OR ACC with data value

OR with ACC long immediate with shift

OR with ACC long immediate with shift of 16

OR ACCB with ACC

Rotate ACC 1 bit left

Rotate ACCB and ACC left

Rotate ACC 1 bit right

Rotate ACCB and ACC right

Store ACC in ACCB

Store high ACC with shift

Store low ACC with shift

Store ACCL to memory-mapped register

Shift ACC 16 bits right if TREG1 [4] = 0

Shift ACC0âACC15 right as specified by TREG1 [3 â 0]

Subtract ACCB from ACC

Subtract ACCB from ACC with borrow

Shift ACC 1 bit left

Shift ACCB and ACC left

Shift ACC 1 bit right

Shift ACCB and ACC right

Subtract from ACC with shift

Subtract from ACC with shift of 16

Subtract from ACC short immediate

Subtract from ACC long immediate with shift

ABS

ADCB

ADD

ADD

ADD

ADD

ADDB

ADDC

ADDS

ADDT

AND

AND

AND

ANDB

BSAR

CMPL

CRGT

CRLT

EXAR

LACB

LACC

LACC

LACC

LACL

LACL

LACT

LAMM

NEG

NORM

OR

OR

OR

ORB

ROL

ROLB

ROR

RORB

SACB

SACH

SACL

SAMM

SATH

SATL

SBB

SBBB

SFL

SFLB

SFR

SFRB

SUB

SUB

SUB

SUB

1011 1110 0000 0000

1011 1110 0001 0001

0010 SHFT IAAA AAAA

1011 1000 IIII IIII

1011 1111 1001 SHFT

0110 0001 IAAA AAAA

1011 1110 0001 0000

0110 0000 IAAA AAAA

0110 0010 IAAA AAAA

0110 0011 IAAA AAAA

0110 1110 IAAA AAAA

1011 1111 1011 SHFT

1011 1110 1000 0001

1011 1110 0001 0010

1011 1111 1110 SHFT

1011 1110 0000 0001

1011 1110 0001 1011

1011 1110 0001 1100

1011 1110 0001 1101

1011 1110 0001 1111

0001 SHFT IAAA AAAA

1011 1111 1000 SHFT

0110 1010 IAAA AAAA

1011 1001 IIII IIII

0110 1001 IAAA AAAA

0110 1011 IAAA AAAA

0000 1000 IAAA AAAA

1011 1110 0000 0010

1010 0000 IAAA AAAA

0110 1101 IAAA AAAA

1011 1111 1100 SHFT

1011 1110 1000 0010

1011 1110 0001 0011

1011 1110 0000 1100

1011 1110 0001 0100

1011 1110 0000 1101

1011 1110 0001 0101

1011 1110 0001 1110

1001 1SHF IAAA AAAA

1001 0SHF IAAA AAAA

1000 1000 IAAA AAAA

1011 1110 0101 1010

1011 1110 0101 1011

1011 1110 0001 1000

1011 1110 0001 1001

1011 1110 0000 1001

1011 1110 0001 0110

1011 1110 0000 1010

1011 1110 0001 0111

0011 SHFT IAAA AAAA

0110 0101 IAAA AAAA

1011 1010 IIII IIII

1011 1111 1010 SHFT

WORDS

1

1

1

1

2

1

1

1

1

1

1

2

2

1

1

1

1

1

1

1

1

2

1

1

1

1

1

1

1

1

2

2

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

2

CYCLES

1

1

1

1

2

1

1

1

1

1

1

2

2

1

1

1

1

1

1

1

1

2

1

1

1

1

1 or 2

1

1

1

2

2

1

1

1

1

1

1

1

1

1 or 2

1

1

1

1

1

1

1

1

1

1

1

2

38

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