AM1705_1007 Datasheet, PDF (38/156 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
SPRS657A – FEBRUARY 2010 – REVISED APRIL 2010
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RESET must be released only in order for boundary-scan JTAG to read the variant field of IDCODE
correctly. Other boundary-scan instructions work correctly independent of current state of RESET. For
maximum reliability, the device includes an internal pulldown on the TRST pin to ensure that TRST will
always be asserted upon power up and the device's internal emulation logic will always be properly
initialized.
JTAG controllers from Texas Instruments actively drive TRST high. However, some third-party JTAG
controllers may not drive TRST high but expect the use of a pullup resistor on TRST. When using this type
of JTAG controller, assert TRST to intialize the device after powerup and externally drive TRST high
before attempting any emulation or boundary scan operations.
RTCK is maintained active through a POR.
A summary of the effects of Power-On Reset is given below:
• All internal logic (including emulation logic and the PLL logic) is reset to its default state
• Internal memory is not maintained through a POR
• All device pins go to a high-impedance state
CAUTION: A watchdog reset triggers a POR.
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Peripheral Information and Electrical Specifications
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