DAC3283 Datasheet, PDF (35/50 Pages) Texas Instruments – Dual-Channel, 16-Bit, 800 MSPS, Digital-to-Analog Converter (DAC)

DAC3283
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SLAS693A – MARCH 2010 – REVISED APRIL 2010
QUADRATURE MODULATION CORRECTION (QMC)
The Quadrature Modulator Correction (QMC) block provides a means for adjusting the gain and phase of the
complex signal. At a quadrature modulator output, gain and phase imbalances result in an undesired sideband
signal.
The block diagram for the QMC is shown in Figure 42. The QMC block contains 3 programmable parameters:
qmc_gaina(10:0), qmc_gainb(10:0) and qmc_phase(9:0).
Registers qmc_gaina(10:0) and qmc_gainb(10:0) control the I and Q path gains and are 11 bit values with a
range of 0 to approximately 2. This value is used to scale the signal range. Register qmc_phase(9:0) controls the
phase imbalance between I and Q and is a 10-bit value that ranges from –1/8 to approximately +1/8. This value
is multiplied by each Q sample then summed into the I sample path. This operation is a simplified approximation
of a true phase rotation and covers the range from –3.75 to +3.75 degrees in 1024 steps.
A write to register CONFIG27 is required to load the gain and phase values (CONFIG27-CONFIG30) into the
QMC block simultaneously. When updating the gain and/or phase values CONFIG27 should be written last.
Programming any of the other three registers will not affect the gain and phase settings.
qmc_gaina (10:0)
16
A Data In
11
x
16
S
A Data Out
x ¹⁰
qmc_phase (9:0)
16
B Data In
x
11
16
B Data Out
qmc_gainb (10:0)
Figure 42. QMC Block Diagram
DIGITAL OFFSET CONTROL
The qmc_offseta(12:0) and qmc_offsetb(12:0) values in registers CONFIG20 through CONFIG23 can be used to
independently adjust the A and B path DC offsets. Both offset values are in represented in 2s-complement format
with a range from –4096 to 4095.
Note that a write to register CONFIG20 is required to load the values of all four qmc_offset registers
(CONFIG20-CONFIG23) into the offset block simultaneously. When updating the offset values CONFIG20 should
be written last. Programming any of the other three registers will not affect the offset setting.
The offset value adds a digital offset to the digital data before digital-to-analog conversion. Since the offset is
added directly to the data it may be necessary to back off the signal to prevent saturation. Both data and offset
values are LSB aligned.
Copyright © 2010, Texas Instruments Incorporated
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